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If your domU is Linux, make sure to add console=ttyPS1,115200 to its kernel command line. In case of dom0less DomUs, you have to edit the boot.source script to add the command line option, then recreate boot.scr with mkimage.

PCI Passthrough assignment

Turn xen.dtb into xen.dts:

Code Block
dtc -I dtb -O dts xen.dtb > xen.dts

The, edit xen.dts by adding xen,passthrough; under the node of the device to assign, in this case pcie@fd0e0000:

Code Block
pcie@fd0e0000 {
    compatible = "xlnx,nwl-pcie-2.11";
    status = "disabled";
    #address-cells = <0x3>;
    #size-cells = <0x2>;
    #interrupt-cells = <0x1>;
    msi-controller;
    device_type = "pci";
    interrupt-parent = <0x4>;
    interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
    interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
    msi-parent = <0x31>;
    reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>;
    reg-names = "breg", "pcireg", "cfg";
    ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>;
    interrupt-map-mask = <0x0 0x0 0x0 0x7>;
    bus-range = <0x0 0xff>;
    interrupt-map = <0x0 0x0 0x0 0x1 0x32 0x1 0x0 0x0 0x0 0x2 0x32 0x2 0x0 0x0 0x0 0x3 0x32 0x3 0x0 0x0 0x0 0x4 0x32 0x4>;
    power-domains = <0x26 0x3b>;
    clocks = <0x3 0x17>;
    xlnx,bar0-enable = <0x0>;
    xlnx,bar1-enable = <0x0>;
    xlnx,bar2-enable = <0x0>;
    xlnx,bar3-enable = <0x0>;
    xlnx,bar4-enable = <0x0>;
    xlnx,bar5-enable = <0x0>;
    xlnx,pcie-mode = "Root Port";
    xlnx,tz-nonsecure = <0x0>;
    phandle = <0x31>;
    iommus = <0x28 0x4d0>;
    xen,passthrough = <1>;
    legacy-interrupt-controller {
            interrupt-controller;
            #address-cells = <0x0>;
            #interrupt-cells = <0x1>;
            phandle = <0x32>;
    };
}; 

Since the PCIe is a DMA-capable device, it should be included in the SMMU section of the xen.dts. Make sure that the PCIe base address in the IOMMU address map exists in the list of mmu-masters. Please refer the latest version of Zynq Ultrascale + MPSoC TRM (UG1085):
a) Find PCIe master device in the table given in the section AXI Master IDs and pick the corresponding master ID, which is 0011010000.
b) Expand these 10 bits to 12 bits, the top 2 bits are simply indicating which TBUn device is behind, this can be found in the Zynq UltraScale+ MPSoC TRM
Interconnect Functional Description section. For PCIe it is TBU1, i.e. the address will be 010011010000=0x4d0.

Add xen,passthrough and iommus cells in xen.dts. Convert xen.dts back into xen.dtb.

Creation of passthrough-pci.dts:
Please see attached passthrough-pci.dts for example of partial device tree file and convert the above dtc into dtb using dtc compiler:

Code Block
dtc -I dts -O dtb -o  passthrough-pci.dtb  passthrough-pci.dts

Finally, The next step is to configure guest domain to correspond to the pass-through mode.
The guest configuration file should look as follows:

Code Block
# Guest name
name = "guest0"
# Kernel image to boot
kernel = "/boot/Image"
ramdisk = "/boot/xen-rootfs.cpio.gz"
extra = "root=/dev/ram0 init=/bin/sh console=hvc0 rdinit=/sbin/init"
# Initial memory allocation (MB)
memory = 1024
# Number of VCPUS
vcpus = 2
# Passthrough
dtdev = [ "/amba/pcie@fd0e0000" ]
device_tree = "/etc/xen/domu.dtb"
irqs = [ 146, 147, 148, 150 ]
iomem = [ "0xfd0e0,1", "0xfd480,1", "0xe0000,1000"]

The options needed for pass-through mode are defined below:
dtdev - The absolute path of the device to be passed through in the device tree
device_tree - absolute path of partial device tree in the Domain 0
irqs - interrupt number inside interrupt queue for the guest domain (see calculation steps below)
iomem - the number of physical memory pages to be passed to the guest (see calculation steps below)

IRQS calculation

  • to calculate irqs corresponding to the guest domain, it needs to find the following line in PCIe settings described in xen.dts file:

Code Block
interrupts = <0x0 0x76 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
  • take the interrupt which is device specific, in this case 0x76, 0x74, 0x73, 0x72 the rest of interrupts appears elsewhere as well, add 32 which is thebase address of interrupt handler.

Code Block
0x72 = 114
irqs[1] = 114 + 32 = 146
irqs[2] = 115 + 32 = 147
irqs[3] = 116 + 32 = 148
irqs[4] = 118 + 32 = 150

Setup IOMEM field

iomem = [ "0xfd0e0,1", "0xfd480,1", "0xe0000,1000"]
1 page starting at "0xFD0E0000" base address of AXIPCIE_MAIN register (AXI to PCIe Bridge, Main Control and Status registers), 1 page starting at "0xFD480000" base address of PCIE_ATTRIB register (Register block that holds the attributes of the PCIe Controller, PCIe Attributes) and 1000 page starting at 0xe0000 base address for data.

Note that PCIe is mapped to multiple regions and it all needs to be on one single iomem line.

Check Starting Linux guests with Pass-through networking for another passthrough example.