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Introduction
This page gives an overview of mutex driver which is available as part of the Xilinx Vivado and SDK distribution.In a multi-processor environment, the processors share common resources. The Mutex core provides a mechanism for mutual exclusion to enable one process to gain exclusive access to a particular resource.
The Mutex core contains a configurable number of mutexes.
Each of these can be associated with a 32-bit user configuration register to store arbitrary data.
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Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/mutex/examples
Test Name | Example Source | Description |
|---|---|---|
| Mutex example | This example attempts to lock the Mutex from the processor identified as 0 to prevent the other processor from getting the lock. |
Example Application Usage
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Mutex example
Expected Output
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Xilinx Zynq MP First Stage Boot Loader Release 2021.1 May 4 2021 - 08:06:56 PMU-FW is not running, certain applications may not be supported. PMU Firmware 2021.1 May 4 2021 08:06:56 PMU_ROM Version: xpbr-v8.1.0-0 MutexExample : Starts. MutexExample : Successfully ran Mutex tapp Example MutexExample : Ends. |
Change log
2022.1
- None
2021.2
2021.1
- None
2020.2
- None
2020.1
- None
2019.2
- None
2019.1
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