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The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver Name

Path in Vitis

Path in Github

intc

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/intc

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/intc

Info

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/intc

The driver source code is organized into different folders.  The table below shows the intc driver source organization. 

Directory

Description

doc

Provides the API and data structure details

data

Driver .tcl and .mdd file

examples

Example applications that show how to use the driver features

src

Driver source files

Driver Implementation

For a full list of features supported by this IP, please refer AXI interrupt controller product guide

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https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/ospipsv/examples

Test Name

Example Source

Description

INTC Self test example

xintc_tapp_example.c

This example performs a self-test to ensure that the hardware was built correctly.

INTC simulation mode example

xintc_example.c

This example demonstrates how to use the interrupt controller driver instance and the hardware device. It is designed to
work without any hardware devices to cause interrupts.

INTC low level example

xintc_low_level_example.c

This is an interrupt example which utilizes low level APIs to configure the interrupt in simulation mode

Example Application Usage

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This example performs a self-test to ensure that the hardware was built correctly.

Expected Output

Successfully ran Intc tapp Example

Simulation mode example


This example demonstrates triggering of interrupts in simulation mode.


Expected output

Successfully ran Intc Example

Low level example

This is an interrupt example which utilizes low level APIs to configure the interrupt in simulation mode

Expected output

Successfully ran Intc lowlevel Example

Example Design Architecture

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