This page gives an overview of the bare-metal driver support for the Xilinx® LogiCORE™ IP Zynq USB soft IP.
Table of Contents
| Table of Contents |
|---|
Introduction
This page gives an overview of the Zynq usbps driver which available as part of the Xilinx Vivado and SDK distributionFor more information,
Please refer to Chapter 15: USB3.0 Controller in Zynq7000 TRM
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation and being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
|---|---|---|
| usbps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/usbps | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usbps |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usbps
The driver source code is organized into different folders. The table below shows the usbps driver source organization.
Directory | Description |
|---|---|
doc | Provides the API and data structure details |
data | Driver .tcl and .mdd file |
examples | Example applications that show how to use the driver features |
| src | Driver source files |
Driver Implementation
For a full list of features supported by this IP,
Please refer to Chapter 15: USB3.0 Controller in Zynq7000 TRM
Features Supported
Controller Features Supported
- USB 2.0 High-Speed Host controller (480 Mb/s).
- USB 2.0 HS and FS Device controller.
- USB 1.1 legacy FS/LS.
- On-the-Go, OTG 1.3 supplement.
- Local DMA Engine.
Features Driver support
- Support device mode only
Known Issues and Limitations:
- Host mode is not supported by the standalone driver
- OTG mode is not supported by the standalone driver
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.
These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usbps/examples
Test Name | Example Source | Description |
|---|---|---|
| USB Mass-Storage Gadget - Interrupt Mode | This example does a basic read and writes test from the USB drive in interrupt mode. | |
| USB Audio Gadget | xusbps_audio_example.c | This example supports two audio features in audio mode: 1. Audio UAC1.0 and 2. Audio UAC2.0 |
| Example | Depandent source files (https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usbps/examples) |
|---|---|
| xusbps_intr_example.c | xusbps_class_storage.c,xusbps_class_storage.h,xusbps_ch9_storage.c,xusbps_ch9_storage.h,xusbps_ch9.c,xusbps_ch9.h |
| xusbps_audio_example.c | xusbps_ch9_audio.c,xusbps_ch9_audio.h,xusbps_ch9.c,xusbps_ch9.h,xusbps_class_audio.c,xusbps_class_audio.h,xusbps_audiodata.h |
Example Application Usage
USB 2.0 Peripheral Mode
Mass-Storage: USB Interrupt mode example
Mass storage profile can be tested by compiling xusbps_class_storage.c,xusbps_class_storage.h,xusbps_ch9_storage.c,xusbps_ch9_storage.h,xusbps_ch9.c,xusbps_ch9.h and xusbps_intr_example.c
files together
Testing procedure
...
The below performance results are observed using CrystalDiskMark tool on windows
USB 2.0:
Change Log
2021.2
- None
2021.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L356
...