| Table of Contents |
|---|
Introduction
This page gives an overview of uartps driver which is available as part of the Xilinx Vivado and SDK distribution.The UART controller is a full-duplex asynchronous receiver and transmitter that supports a
wide range of programmable baud rates and I/O signal formats. The controller can
accommodate automatic parity generation and multi-master detection mode.
wide range of programmable baud rates and I/O signal formats. The controller can
accommodate automatic parity generation and multi-master detection mode.
The UART operations are controlled by the configuration and mode registers. The state of
the FIFOs, modem signals, and other controller functions are read using the status, interrupt
status, and modem status registers.
the FIFOs, modem signals, and other controller functions are read using the status, interrupt
status, and modem status registers.
For more details, please refer zynqmp TRM which includes link s to the official documentation and resource utilization.
Source path for the driver:
Source path for the driver:
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
| Driver Name | Path in Vitis | Path in Github |
|---|---|---|
| uartps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/uartps | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/uartps |
| Info |
|---|
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is https://github.com/Xilinx/embeddedsw/tree/ |
Driver
|
-- Doc -
|
- Examples - Reference application to
APIs and calling sequence
|
- Source -
64-byte receive and transmit FIFOs
Programmable protocol:
6, 7, or 8 data bits
1, 1.5, or 2 stop bits
Odd, even, space, mark, or no parity
Parity, framing and overrun error detection
Line-break generation and detection
Interrupts generation
RxD and TxD modes: Normal/echo and diagnostic loopbacks using the mode switch
The following features are supported in the uartps Standalone driver.
Loop UART 0 with UART 1 option
Modem control signals: CTS, RTS, DSR, DTR, RI and DCD are available only on the EMIO interface
Programmable baud rate generator
64-byte receive and transmit FIFOs
Parity, framing and overrun error detection
Line-break generation and detection
Interrupts generation
The driver source code is organized into different folders.
Below diagramThe table below shows the uartps driver source organization.
uartpsDirectory | Description |
|---|
doc |
Provides the API and data structure details |
- Examples - Reference application to
data | Driver .tcl and .mdd file |
examples | Example applications that show how to use the driver |
|
- Source -
features | |
| src | Driver source files |
Driver Implementation
For a full list of features supported by this IP, please refer zynqmp TRM which includes link s to the official documentation and resource utilization.
ControllerFeatures
Supported:Programmable baud rate generator64-byte receive and transmit FIFOs
Programmable protocol:
6, 7, or 8 data bits
1, 1.5, or 2 stop bits
Odd, even, space, mark, or no parity
Parity, framing and overrun error detection
Line-break generation and detection
Interrupts generation
RxD and TxD modes: Normal/echo and diagnostic loopbacks using the mode switch
The following features are supported in the uartps Standalone driver.
Loop UART 0 with UART 1 option
Modem control signals: CTS, RTS, DSR, DTR, RI and DCD are available only on the EMIO interface
Standalone Driver Supported Features
The uartps Standalone driver support the below things.Programmable baud rate generator
64-byte receive and transmit FIFOs
Parity, framing and overrun error detection
Line-break generation and detection
Interrupts generation
RxD and TxD modes: Normal/echo and diagnostic loopbacks using the mode switch
Known issues
Known issues
Known Issues and Limitations
NoneTest casesExample Applications
Refer below pah for testing different examples for each feature of the IP.to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/uartps/examples
Summary:
- xuartps: Fix the Buffer Overflow issue in the Receive path.
- ebf447c xuartps: Fix the Buffer Overflow issue in the Receive path.
2018.1
- None
2018.2
- None
2018.3
Summary:
- uartps: Resolves MISRA-C:2012 compliance mandatory violations.
Commits:
- 04cf58b uartps: Resolves MISRA-C:2012 compliance mandatory violations.
2019.1
- None
2019.2
- None
2020.1
- Summary
- uartps: Add clocking support
- uartps: Modify the XUARTPS_MAX_RATE to 6240000
- Commits
2020.2
None| Test name |
|---|
ChangeLog
2016.3Summary:
- uartps: Modified the transmission break bit set logic.
- e4285c4 uartps: Modified the transmission break bit set logic.
- None
Summary:
- xuartps: Fixed compilation warnings
- uartps: sync UART_CLK_FREQ_HZ parameter with xparameters.h file uart frequency parameter macro
- uartps : Fixed compilation warnings
- uartps : Added xil_printf statement in examples
- uartps: Added readme.txt file to generate doxygen for examples
- 64da84b xuartps : Fixed compilation warnings
- 74c9d16 uartps: sync UART_CLK_FREQ_HZ parameter with xparameters.h file uart frequency parameter macro
- 9f97f45 uartps: Fixed compilation warnings
- e11fddf uartps : Added xil_printf statement in examples
- d586063 uartps: Added readme.txt file to generate doxygen for examples
- None
Summary:
- Updated the source files to updated addtogroup version numbers
- 04cf58b Updated the source files to updated addtogroup version numbers
| Example Source | Description | |
|---|---|---|
| Uart Interrupt example | xuartps_intr_example.c | This example does basic read and write test with interrupts. |
| Uart polled example | xuartps_polled_example.c | This example does basic read and write test using polling. |
| Uart hello world example | xuartps_hello_world_example.c | This example prints a string. |
Example Application Usage
Uart Interrupt example
This example does basic read and write test with interrupts.
Expected Output
| Code Block |
|---|
Successfully ran UART Interrupt Example Test |
Uart polled example
Expected Output
| Code Block |
|---|
Successfully ran UART Polled Mode Example Test |
Uart hello world example
Expected Output
| Code Block |
|---|
HelloWorld
Successfully ran Uartps hello world Example |
Example Design Architecture
NA
2020.2
2020.1
2019.2
None
2019.1
None