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Table of Contents

Table of Contents

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Introduction


The AXI USB device IP is an USB device controller IP. It has no support for OTG mode. This IP can be instantiated on FPGA or Zynq or ZynqMP PL. This page describes the usage of AXI USB device IP standalone driver.

How to Enable

Source Path for the driver:


https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation and being available in the Xilinx Github repository. 


Driver Name

Path in Vitis

Path in Github

usb

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/usbpsu

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/


Note: To view the sources for a particular release, use the rel-version tag in Github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/

Driver


The driver source code is organized into different folders.

Below diagram

  The table below shows the

usbpsu

usb driver source organization


Directory
usb
Description
|

doc

-- Doc -

Provides the API and data structure details


|
- Examples - Reference application to

data

Driver .tcl and .mdd file

examples

Example applications that show how to use the driver

APIs and calling sequence
|
- Source -

features

src

Driver source files


Driver Implementation

For a full list of features supported by this IP,

Axi-USB: https://www.xilinx.com/products/intellectual-property/axi_usb2_device.html

Link: https://www.xilinx.com/support/documentation/ip_documentation/axi_usb2_device/v5_0/pg137-axi-usb2-device.pdf

Features Supported

Controller Features Supported

  • USB 2.0 HS and FS Device controller.
  • USB 1.1 legacy FS/LS.
  • Local DMA Engine.

Driver Features Supported

  • Support device mode only

Known Issues and Limitations

  • Host mode is not supported
  • OTG mode is not supported

Performance

  • The below performance results are observed using CrystalDiskMark tool on windows
    Image Removed
Test Procedure

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package settings tab. 

Links to Examples

Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/examples


Test Name

Example Source

Description
USB Mass-Storage Gadget - Poll Mode 

xusb_storage_polled_mode.c

This example does a basic read and writes test from the USB drive in polled mode.


Example Application Usage

Mass-Storage: USB Polled/Interrupt mode example

Mass storage profile can be tested by compiling xusb_storage_polled_mode.c,xusb_cp9.c,xusb_cp9.h,xusb_storage.h,xusb_types.h, 
files together

USB 2.0 Peripheral Mode

The below gives the testing procedure of axi-usb device standalone example which operates as a mass storage gadget

Testing procedure

Mass storage profile can be tested by compiling files found in the below link

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/examples


Below is the testing procedure of AXI USB standalone example which operates as a mass storage gadget
  • Download and run the generated USB 2.0 example ELF
  • Connect board setup to standard host(Windows/Linux)machine USB 2.0 port.

Expected Output

  • You will get a pop-up window on Window a Windows machine for formatting the size 256MB. After the format completes, you can copy the file to usb device.
    Image Removedthe USB device.

Example Design Architecture

AXI-USB specific design. 

Performance

The below performance results are observed using CrystalDiskMark tool on windows

Image Added

Change Log

...

2021.

...

1

...

  • None

2017.4

  • None

2018.1

  • None

2018.2

  • None

2018.3

  • None

2019.1

  • None

2019.2

  • None

2020.1

  • None

2020.2

  • None

2021.1

...

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L2220

2020.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L715

2020.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L557

2016.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.2/doc/ChangeLog#L43

2016.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.1/doc/ChangeLog#L387

Related Links