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Table of Contents


Introduction


This page gives an overview of AXI-I2C driver which is available as part of the Xilinx Vivado and SDK distribution.

The LogiCORE™ IP AXI IIC Bus Interface connects to the AMBA® AXI specification and provides a low-speed, two-wire,
serial bus interface to a large number of popular devices. This product specification defines the architecture,
hardware (signal) interface, software (register) interface, and parameterization options for the AXI IIC Bus Interface module.

Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iic

Driver source code is organized into different folders. Below diagram shows the iicps driver source organization
Axi-iic
|
-- Doc - Provides the API and data structure details
|
- Examples - Reference application to show how to use the driver APIs and calling sequence
|
- Source - Driver source files
Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver NamePath in VitisPath in Github
iic

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/iic

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iic

Info

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/iic

The driver source code is organized into different folders.  The table below shows the ospipsv driver source organization. 


Directory
Description

doc

Provides the API and data structure details

data

Driver .tcl and .mdd file

examples

Example applications that show how to use the driver features

src

Driver source files

Driver Implementation

For a full list of features supported by this IP, please refer https://www.xilinx.com/support/documentation/ip_documentation/axi_iic

Controller Features Supported:

/v2_0/pg090-axi-iic.pdf

Features

• Register access through AXI4-Lite interface
• Master or slave operation
• Multi-master operation
• Software selectable acknowledge bit
• Arbitration lost interrupt with automatic mode switching from master to slave
• Calling address identification interrupt with automatic mode switching from master to slave
• START and STOP signal generation and detection
• Repeated START signal generation
• Acknowledge bit generation and detection
• Bus busy detection
• Fast-Mode Plus 1 MHz, Fast Mode 400 kHz, or Standard Mode 100 kHz operation
• 7-bit or 10-bit addressing
• General call enable or disable
• Transmit and receive FIFOs – 16 bytes deep
• Throttling
• General purpose output, 1-bit to 8 bits wide
• Dynamic Start and Stop generation
Driver Supported Features
  • The axi-iic Standalone driver support the below things.
  • All Controller Features supported.

Known issues and Limitations

  • None.
Test cases

Example Applications

Refer

below pah for testing different examples for each feature of the IP.

to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab. 


Links to Examples

Examples path: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/iic/examples

Test nameExample sourceDescription
AXI IIC eeprom example in dynamic modexiic_dynamic_eeprom_example.cThis example does read/writes using AXI IIC dynamic mode
AXI IIC eeprom example in standard modexiic_eeprom_example.cThis example does read/writes using AXI IIC standard mode
AXI IIC repeated start examplexiic_repeated_start_example.c

This example does read/writes with repeated start.

Example Application Usage

AXI IIC eeprom example in dynamic mode

This example does read/writes using AXI IIC dynamic mode
Expected Output


Code Block
Successfully ran IIC dynamic eeprom Example


AXI IIC eeprom example in standard mode
This example does read/writes using AXI IIC standard mode
Expected Output


Code Block
Successfully ran IIC eeprom Example


AXI IIC repeated start example
This example does read/writes with repeated start.
Expected Output


Code Block
Successfully ran IIC repeated start Example

ChangeLog

  • 2017.1
    • Added xil_printf statement in examples.
    • Updated Makefile.
    • Added readme.txt file to generate doxygen for examples.
  • 2017.2
    • Modified comment lines notation of functions
    • Changed modification history in examples
  • 2017.3
    • None
  • 2017.4
    • None
  • 2018.1
    • None
  • 2018.2
    • updated copyright for iic
  • 2018.3
    • iic: Update the fifo flush
    • iic: Update the bus wait for the nack caseFixes the bus busy check in case of nack
  • 2019.1
    • drivers: Changes in Makefile to make map file consistent in windows and linux 
  • 2019.2
    • None
  • 2020.1
  • 2020.2