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This page gives an overview of intc driver which is available as part of the Xilinx Vivado and Vitis distribution.Source path for the driver:
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
|---|---|---|
intc | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/intc | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/intc |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/masterxilinx-v2020.1/XilinxProcessorIPLib/drivers/intc
Driver The driver source code is organized into different folders. Below diagram The table below shows the intc driver source organization.
Directory |
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Description |
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doc |
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Provides the API and data structure details |
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data | Driver .tcl and .mdd file |
examples | Example applications that show how to use the driver |
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features | |
src | Driver source files |
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-- data - Contains files for Vitis
Features Supported
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Driver Implementation
For a full list of features supported by this IP, please refer AXI interrupt controller product guide
Features supported
Support up to 32 interrupt inputs
Capable of cascading, to support more than 32 interrupt inputs
Enabling and disabling of individual interrupts.
Capable of generating software interrupts
Known issues and Limitations
Test cases
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Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples path:
https://github.com/Xilinx/embeddedsw/blobtree/master/XilinxProcessorIPLib/drivers/intcospipsv/examples/xintc
Test Name | Example Source | Description |
|---|---|---|
INTC Self test example | This example |
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Successfully ran Intc Example
xintc low level example
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performs a self-test to ensure that the hardware was built correctly. | ||
INTC simulation mode example | This example demonstrates how to use the interrupt controller driver instance and the hardware device. It is designed to | |
INTC low level example | This is an interrupt example which utilizes low level APIs to configure the interrupt in simulation mode |
Example Application Usage
Selftest Example
This example performs a self-test to ensure that the hardware was built correctly.
Expected Output
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Simulation mode example
This example demonstrates triggering of interrupts in simulation mode.
Expected output
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Low level example
This is an interrupt example which utilizes low level APIs to configure the interrupt in simulation mode
Expected output
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Example Design Architecture
NA
Performance
NA
Changelog
2021.1
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.1/doc/ChangeLog#L144
2020.2
Updated tcl to support interrupt ID generation for broader range of HW designs
having slice/concat/OR gate combinationsUpdated Makefile for parallel make execution and incremental build support.
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