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Table of Contents

Introduction

The two SD controllers have the same feature set and can be operated independently. The controller communicates with SDIO devices, SD memory cards, and eMMC cards with up to
eight data lines. In SD mode, data transfers in 1-bit and 4-bit modes. In eMMC mode, data transfers in 1-bit, 4-bit, and 8-bit modes. The interface can be routed through the MIO
multiplexer to the MIO pins or through the EMIO to the SelectIO pin in the PL. The controller is accessed by the APU and RPU via the AXI bus. The controller also includes
a DMA unit with an internal FIFO to meet throughput requirements.
For more information, please refer Chapter 73: Octal SPI Controller in Versal TRM (Versal platform) and Chapter 26: SD/SDIO/eMMC Controller in ZynqMP TRM, which includes links to the official documentation and resource utilization.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver NamePath to VitisPath in Github
sdps<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/sdpshttps://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/


Info

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/sdps


The driver source code is organized into different folders.  The table below shows the sdps driver source organization. 


Directory
Description

doc

Provides the API and data structure details

data

Driver .tcl and .mdd file

examples

Example applications that show how to use the driver features

src

Driver source files


Driver Implementation

For a full list of features supported by this IP, please refer Chapter 73: Octal SPI Controller in Versal TRM (Versal platform) and Chapter 26: SD/SDIO/eMMC Controller in ZynqMP TRM


Features


SD Card interface
• Host clock rate variable between 0 and 208 MHz
• Up to 832Mbits per second data rate using 4 parallel data lines (SDR104 mode)
• Transfers the data in 1 bit and 4 bit SD modes
• Transfers the data in SDR104, SDR50, DDR50, SDR25, SDR12 modes.
• Polled mode data transfers.

eMMC card interface
• Transfers the data in 1 bit, 4 bit and 8 bit modes.
• Supports HS200, DDR52 modes.
• Polled mode data transfers.

Known issues and Limitations

  • Driver supports only polled mode.


Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package settings tab. 

Links to Examples

Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/examples


Test Name

Example Source

Description
Read and Write example without file system

xsdps_raw_example.c

This examples does basic raw read and write test from SD/eMMC device in Polled mode.
Read and Write example with file system (using XILFFS library)

xilffs_polled_example.c

This examples does basic file system read and write test from SD/eMMC device in Polled mode.

Example Application Usage

SDPS Read and Write example without file system

This examples does basic raw read and write test from SD/eMMC device in Polled mode.

Expected Output


Code Block
SD Raw Read/ Write Test
Successfully ran SD Raw Read/ Write Test

Read and Write example with file system (using XILFFS library)

This examples does basic file system read and write test from SD/eMMC device in Polled mode.

Expected Output

Code Block
SD Polled File System Example Test
Successfully ran SD Polled File System Example Test


Example Design Architecture

NA

Performance

SD card : Sandisk Ultra 16GB SDHC card

Zynq:
High speed20.54 MB/sec
ZynqMP:
High Speed19.4 MB/Sec
SDRSDR104: 76.50MB/sec
DDRDDR50: 40.68MB/sec
Note : The SD performance may be impacted by the SD card cluster size. Formatting the card with larger cluster size will be able to produce higher performance. Above performance numbers are achieved by formatting the SD card with highest possible cluster size.

Test cases

The file system example is xilffs_polled_example.c
This file system example creates a new file in an SD/eMMC card (formatted with file system) writes a sequence into the files and reads it back to verify. This example can be modified to write user data to a file or read existing files as required. The API’s are standard file system API’s.

Changelog

2016.3

  • Added support for mkfs in the sd driver. It will calculate the sector size and number of sectors to identify the card capacity.
  • Used usleep API across all the platforms, since MB_SLEEP API is deprecated.
  • Added bus_width, mio_bank and has_emio parameters to tcl file to export to xparameters.h
  • Added support for UHS mode switching based on the card capability.
  • Added Tap delays inside the drivers required for High Speed modes and UHS modes.

2016.4

  • Reduce the delay during power cycle from one second to one milli second.
  • Used emmc_hwreset pin to reset eMMC card rather than relying on power cycle.
  • Enable Rst_n bit in EXT_CSD reg if disabled - This is to enable hw reset functionality in eMMC device.
  • Implemented revived auto-tuning workaround by implementing dll_reset during tuning process.

2017.1

  • Corrected voltage switching sequence as per TRM.
  • Fixed Compilation warnings - CR#957004
  • Add DDR and HSD support for eMMC
  • Support for bus width switching based on hdf
  • Added support for A53-32bit on ZynqMP.
  • Fixed MISRAC mandatory violation - CR#970531
  • Fixed UR data flow anomalies
  • Add support in EL1 non secure mode

2017.2

  • None

2017.3

  • Added support for 200MHz in SD
  • Added support for 64bit DMA addressing
  • Added support for CCI in SD
  • Modified Tap Delay settings to avoid potential data corruption

2017.4

  • None

2018.1

  • Use different commands for single and multiple block transfers
  • Separate out SDR104 and HS200 clock macro defines
  • Move UHS macro check to SD card init routine
  • Resolve build warning for sdps driver

2018.2

  • None

2018.3

  • Added support for using 64Bit DMA in 32Bit Processor
  • Modified driver to do Cache Invalidate after Read DMA
  • Changed Expected Response for CMD3 to R1 for MMC
  • Added Support for 64 bit DMA addresses for Microblaze-X

2019.1

  • Added UHS mode support for Microblaze platform
  • Add support for Cache Invalidation after the Read DMA is complete
  • Added idling support for SDIO

2019.2

  • Added cache invalidation after getting bus width information as ARM suggested.

2020.1

  • Added SDPS Raw Test Example
  • Restructured the SDPS driver for more readability and modularity
  • Made changes for compliance with safety applications
  • Added clocking support in SDPS driver

2020.2

  • Added support for non-blocking read.
  • Added workaround for power cycle issue - Prevent removing pull up on D3 line.

2021.1

  • b39ee90 - Added support for non-blocking write.
  • e48ad41 - Fix the issues in reading CID and CSD.
    • c6b81c7 - Fix the compilation issue in EL1_NS + Cortex-A72.

    Changelog

    2021.1

    https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L466

    2020.2

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L228

    2020.1

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L100

    2019.2

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L15

    2019.1

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L150

    2018.3

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.3/doc/ChangeLog#L137

    2018.2

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.2/doc/ChangeLog#L85

    2018.1

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.1/doc/ChangeLog#L273

    2017.4

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.4/doc/ChangeLog#L18

    2017.3

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.3/doc/ChangeLog#L329

    2017.2

    None

    2017.1

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.1/doc/ChangeLog#L326

    2016.4

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.4/doc/ChangeLog#L44

    2016.3

    https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.3/doc/ChangeLog#L178