Zynq UltraScale+ RFSoC Power Advantage Tool 2019.2 ZCU208
Now that you have installed and run the Pre-Built Power Advantage Tool, let’s take a moment to see what else you can do with it. The Power Advantage Tool Control Console can be used with designs, to monitor power during the design process. In addition, the Power Advantage Tool can be used as a demonstration of the power savings with various designs.
Table of Contents
Known 2019.2 Issues:(1) The MSP430 source builds the compatible MSP430 version, but may not support all MSP430 TI Code Composer Studio debug features.Note: The Power Advantage Tool now takes control of the APU serial port if available. To give user control of the APU terminal, close the Power Advantage Tool, then launch the following script to open terminals, then open the Power Advantage Tool again. The Power Advantage Tool will complain that "No APU UART available", but just close that message.Warning:
|Date||Version||Author||Description of Revisions|
|Mar 25, 2020||jerrywo||Created|
If you have connected Micro USB (UART) (J83) to PC for the first time, or switched boards, you may need to wait a few minutes for the PC to recognize the new hardware. Then you can open the Power Advantage Tool.
Launch the Power Advantage Tool Shortcut at C:\ZynqUS_Demos\2019.2_Demos\ZynqusPowerTool.exe ZCU216
In a few seconds, you should see a Power Advantage Tool Control Console window with a Power Report. The Power numbers should update every few seconds.
If it is not displayed properly, refer to “Common Setup Issues”, and debug until the “Power Advantage Tool is alive” before returning here to continue.
After successfully launching the Power Advantage Tool, you should see the following Power Advantage Tool Control Console window (may take a few seconds):
Figure 1. Power Advantage Tool Control Console
This interface is important to most of the demonstrations, so it would be good to familiarize yourself with it. Take a moment to identify the following:
- Zoom Display (transparent button [ ]) (A) resizes to fill a 1920x1080 display.
- Close (transparent button [X]) (B)
- Minimize (C)
- Select (D) Selects the display mode (Rails, Plot, About contains the version number)
- Preset (E) Not supported in this version.
- Block Diagram of Zynq (F) shows the current device state.
- Power Totals for various domains (G) (Note: There can be a few seconds delay for measurement and update.)
Here is a Table of the Rails for ZCU216:
- VCC1V2 – DDR Termination
- MGT1V2 – GTH Termination Power
- MGT1V8 – GTH Power
- VCCPSINT – PS Core Rail (Combined FPD and LPD)
- VCC1V8 – Auxiliary Circuits
- VCCINT – PL Core Rail
- VADJ_FMC – Main FMC Rail
- MGTAVCC – Receiver and Transmitter Internal
- VCCINT_AMS – ADC and DAC Digital Logic
- DAC_AVTT – DAC Termination
- DAC_AVCCAUX – Analog for the custom DAC block
- ADC_AVCC – Digital for the custom ADC block
- ADC_AVCCAUX – Analog for the custom ADC block
- DAC_AVCC – Digital for the custom DAC block
It is a power advantage to be able to turn off unused circuitry. The more power islands and domains you have, the more flexibility you have to save power.
Islands are power switched internally to the Zynq UltraScale+ MPSoC, whereas Domains are powered externally to the Zynq device. When Domain or island switching can be done, this has the advantage of drawing no power by being able to completely turn off a portion of the silicon device.Note:
Switching off domains can clear the program memory until reboot.
Control can be over entire Domains or individual Islands.
1.3 Domain ControlNote:
Direct GUI power domain control is not supported in this version.
Pressing the Select button gives a menu to select from various displays:
- Plot: Graphically displays the power for each of the three domains and total power.
Figure 4. Plot.
- Rails: This is the default display. Rails displays the voltage and power for each of the rails, as well as the chip temperature, and the total power. The power measurements are made external to the Zynq by TI INA226 chips.
Figure 5. Rails.
- Sysmon: Display temperature and voltages read from Sysmon.
- Legend: This page defines each of the Zynq rails.
Figure 6. Legend.
- About: This page contains the legal notice, as well as the software revisions for Qt and MSP430 code.
Figure 7. About.Home Previous Back Next