Versal Premium Series VPK120 Evaluation Kit
This is an additional resource for the Versal Premium Series VPK120 Evaluation Kit and does not replace the official documentation of the Versal Premium Series VPK120 Evaluation Kit on Xilinx.com.
Table of Contents
Introduction
VPK120 is a Versal™ Premium series evaluation kit, equipped with the Versal® Premium series VP1202 Adaptive SoC device. It offers networked, power-optimized cores paired with multiple high-speed connectivity options. The kit is built for network and cloud applications requiring massive serial bandwidth, security, and compute density.
Getting Started
This section provides the prep-work, board setup and files needed to boot and run a couple of designs on the VPK120 board. You will need to download files and applications to interface with the boards but no installation or knowledge of the Xilinx tools is needed to run these on the VPK120.
For board set up and configuration, refer to the VPK120 Board User Guide, UG1568
Prep Work
You will need a terminal interface such as Tera Term or PuTTY to interface with the UART to boot the VPK120 board. Please download your choice before getting started.
The next step is to download the PetaLinux BSP from the Linux Prebuilt Images wiki page. The PetaLinux BSP will give you a pre-built image that will allow you to boot Linux and interact via a terminal to run some examples.
Board Setup
Board setup is quick and easy, the following are the instructions and diagrams for setup.
Running a design
For the design that you have download via the PetaLinux BSP for the VPK120 board here are the instructions to run them once you have prepared the SD card.
Set up a terminal session between a PC COM port and the serial port on the evaluation board. See below. Determine which COM to use to access the USB serial port on the VPK120 board. Make sure that the VPK120 board is powered on and a micro micro USB cable is connected between VCK120 board and host PC. This ensures that the USB-to-serial bridge is enumerated by the PC host.
Using Tera Term connect to the first Serial Connection, below is an example
Click OK and and the Tera Term window will pop up. In the Setup change the serial port speed to 115200, this will match the speed of the UART on the VCK190.
Power up the board you will see the boot messages from the Versal Adaptive SoC VP1202 and you will see a Linux Prompt in the Terminal Window. Log in with root as the user and the password.
PetaLinux Board Support Packages (BSP) include pre built images, a design and all of the necessary instructions to rebuild the pre-built images from scratch. With PetaLinux, developers can have their Xilinx-based hardware booted and running about 5 minutes after installation; ready for application, library and driver development. The base design that is included can be used as a starting point for hardware developers while the instructions on how to rebuild the Linux image can be used as a starting point by embedded software engineers to create a custom Linux image. The PetaLinux BSP can be downloaded from the Linux Prebuilt Images wiki page..
Versal Example Designs
General Example Designs
Below is a list of available example designs showcasing particular IP, Silicon features or tool flows targeting Versal Adaptive SoC devices.
Link: General Versal Example Designs
CPM5-Core Example Design
The CPM5 Example demonstrates data movement between an x86 Host memory and the Versal DDR Memory via the PCIe and the QDMA Data mover IP present in the CPM Block.
The Design files can be downloaded here:
Design Files: XTP712.zip
Instructions: XTP712.pdf
MRMAC Example Design
The Example Design for MRMAC on VPK120 can be generated by referring to the Example Design Section in the Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314).
The steps for setting the required reference frequency for the MRMAC Example design can be found on the Programming the GT Clocks for Versal MRMAC and DCMAC Example Designs page.
DCMAC Example Design
The Example Design for DCMAC on VPK120 can be generated by referring to the Example Design Section in the Versal Adaptive SoC 600G Channelized Multirate Ethernet Subsystem (DCMAC) LogiCORE IP Product Guide (PG369).
The steps for setting the required reference frequency for the DCMAC Example design can be found on the Programming the GT Clocks for Versal MRMAC and DCMAC Example Designs page.
IBERT Example Design
The IBERT Example Design shows how to generate a design that helps you debug and verify a system that uses Xilinx high-speed gigabit transceiver (GT) technology. The link to the example design is below.
Link: IBERT Example Design
Versal System Controller
The Board evaluation and management (BEAM) tool is the main menu of the System Controller. It primarily serves as a launcher for running the board interface test (BIT) and to set/change/read board parameters such as clocks, FMC, voltages, etc. when running Targeted Reference Designs (TRDs) or developing custom applications. The BEAM tool aims to enhance the out-of-the-box experience for Versal evaluation board users through an easy to use web-based UI.
The BEAM tool is currently in OPEN BETA. Please follow the instructions provided in the link below to proceed with the tool.
VPK120 Versal System Controller and BEAM Tool - Setup and Launch instructions
Xilinx Tools
The Xilinx tools provide all required tool chains to compile and link applications for Xilinx supported platforms, create and configure hardware designs, and create bitstreams.
Related Links
Product Page - Versal Premium Series VPK120 Evaluation Kit
Master Answer Record - https://support.xilinx.com/s/article/000033613?language=en_US
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