Zynq-7000 AP SoC SATA part 1 – Ready to Run Design Example Setup

Zynq-7000 AP SoC SATA part 1 – Ready to Run Design Example Setup

Zynq SATA Storage Extension

The Zynq SATA Storage Extension (Zynq SSE) is a fully integrated and pre-validated system stack comprising 3rd-party SATA Host Controller and DMA IP cores from ASICS World Services, a storage micro-architecture from Missing Link Electronics (MLE), Xilinx PetaLinux, and an Open Source SATA Host Controller Linux kernel driver, also from MLE. Zynq SSE utilizes the Xilinx GTX Multi Gigabit Transceivers to deliver SATA I (1.5Gbps), SATA II (3.0Gbps), or SATA III (6 Gbps) connectivity. The Zynq SSE is delivered as a complete reference design for the Xilinx Zynq-7000 SoC (Zynq), and effectively extends Zynq with one single SATA host port for HDD and SSD storage connectivity. This Technical Tip shows how to setup the Zynq SSE. After going through the steps described herein, you will have a working Linux System running on the Zynq with an attached SATA HDD or SSD.
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Block Diagram

=The block diagram shown below gives an overview over the Zynq SSE reference design: Within the Zynq Programmable Logic (PL) the MLE storage micro-architecture instantiates the DMA and the SATA Host Controller IP blocks. The storage micro-architecture itself interfaces with the Zynq Processing System (PS) via the high-performance AXI HP0 slave port. The ARM A9 in the PS runs Xilinx PetaLinux and the SATA Linux kernel driver.


Implementation Details
Design TypePS + PL
SW TypeLinux (Petalinux)
CPUs2 CPUs 700 MHz
Boards/ToolsAvnet Mini ITX Z045
Xilinx Tools VersionVivado 2014.1, PETALINUX 2013-2
Other DetailsSATA SSD(including Cable and Power Supply), SD-Card

Address Map

Base AddressSizeInterface
SATA IP0x410000004KS AXI
DMA IP0x410100004KS AXI, M AXI

Files Provided
SD Card ImageAll Files needed to run the ZYNQ SSE
For the available Project to built your ZYNQ SSE go to http://mlecorp.com/zynqsse

Step by Step Instructions

Hardware needed:
  • Avnet Mini ITX Z045 Board (including Power supply) Link
  • Micro USB Cable for USB Console
  • Supported SSD (for Example Samsung 840)
  • Power Supply for SSD
  • Micro SD Card (2 GB or bigger)
  • PC for UART console
    Software Assembly:
    1. Format the SD Card using FAT32 File system
    2. Put image.ub and BOOT.bin into the root directory of the SD Card
    Hardware Assembly:
  1. Insert the SD Card into the Avnet Mini ITX board’s SD Slot
  2. Connect the micro USB cable to the UART port of the Avnet Mini ITX board and the USB Port of your PC
  3. Connect the SSD to the SATA connector on the Avnet Mini ITX board using the SATA Cable.
  4. Connect the SSD to power
  5. Switch the Avnet Mini ITX board’s SW7 to SD Boot mode (as shown in picture)
  6. Connect the Avnet Mini ITX board to the Power Supply

The system should now look like in the supplied image

  1. Switch on the Avnet Mini ITX board
  2. On the PC open a Serial Terminal on the new serial port using the settings 115200 Baud 8N1
3. Observe the Linux System booting

4. After some time you should see a screen similar to the screenshot in the Expected Results.
5. Login using

• Login:root
• Password: root

LED Description

Status LEDs can be found next to the PCIe connector. The associated meanings can be seen in the following table and in the Image below.

Expected Results

As a result you should be having a running Linux system on the Zynq board. The UART Console output should be similar to the screenshot below.
The Evaluation Reference Design (ERD) of the Zynq SSE comprises a hardware license management which allows to run full SATA functionality for up to 12 hours after power-up. After approximately 12 hours the evaluation expires, which is indicated by illuminating the LED ’timeout’. You will also notice that the Linux kernel driver informs you of having lost the SATA link to the SSD/HDD.
D7Timeout LED, indicates the Timeout of the IP core.
D6Gen3 Link, indicates 6 GBit/s connection
D5Gen2 Link, indicates 3 GBit/s connection
D4Linkup and Activity, Led will light up on Linkup and will go dark during data transfers

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