SATA

Table Of Contents

Introduction

Serial ATA or SATA was designed to replace the old parallel ATA (or IDE) interface used mainly for storage devices. SATA uses the same ATA/ATAPI command-set, but uses serial communication over 2 wire pairs at rates of 1.5, 3.0, and 6.0Gbit/sec. Serial data is 8b/10b encoded.

HW IP Features

  • SATA host controller supports 2 ports
  • Compliant with SATA 3.1 specs
  • Compliant with Advanced Host Controller Interface (AHCI) ver. 1.3
  • Supports 1.5, 3.0 and 6.0 Gbps data rates
  • 64-bit AXI master port with built-in DMA
  • 40/44 bit address space support
  • AHB/APB port for register programming
  • Supports Power management features like ‘partial’ and ‘slumber’ modes
Note:
Due to the new PSGTR driver introduce in upstream flow, we have devicetree configurations based on the release:
  • Support till 2020.2 release
  • Support form 2021.1 release

Missing Features, Known Issues and Limitations

  • Doesn't support Devslp feature


Kernel Configuration

These below settings are to be set for enabling SATA support in Linux

< > ATA/ATAPI/MFM/RLL support (DEPRECATED)  ----
SCSI device support  --->
<*> Serial ATA and Parallel ATA drivers (libata)  --->
[*] Multiple devices driver support (RAID and LVM)  --->
<M> Generic Target Core Mod (TCM) and ConfigFS Infrastructure  --->
--- Serial ATA and Parallel ATA drivers (libata)
[*]   Verbose ATA error reporting
[*]   SATA Port Multiplier support
*** Controllers with non-SFF native interface ***
<*>   AHCI SATA support
< >   Platform AHCI SATA support (NEW)
<*>   Ceva AHCI SATA support (NEW)
< >   Initio 162x SATA support (Very Experimental)
< >   ACard AHCI variant (ATP 8620) (NEW)
< >   Silicon Image 3124/3132 SATA support

Devicetree

Support till 2020.2 release:


Binding for CEVA AHCI SATA Controller

Required properties:
  - reg: Physical base address and size of the controller's register area.
  - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
  - clocks: Input clock specifier. Refer to common clock bindings.
  - interrupts: Interrupt specifier. Refer to interrupt binding.
  - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.
  - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
			CINMP : COMINIT Negate Minimum Period.
			CIBGN : COMINIT Burst Gap Nominal.
			CIBGMX: COMINIT Burst Gap Maximum.
			CIBGMN: COMINIT Burst Gap Minimum.
  - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.
  - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
			CWBGMN: COMWAKE Burst Gap Minimum.
			CWBGMX: COMWAKE Burst Gap Maximum.
			CWBGN: COMWAKE Burst Gap Nominal.
			CWNMP: COMWAKE Negate Minimum Period.
  - ceva,p0-burst-params: Burst timing value for COM parameter for port 0.
  - ceva,p1-burst-params: Burst timing value for COM parameter for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
			BMX: COM Burst Maximum.
			BNM: COM Burst Nominal.
			SFD: Signal Failure Detection value.
			PTST: Partial to Slumber timer value.
  - ceva,p0-retry-params: Retry interval timing value for port 0.
  - ceva,p1-retry-params: Retry interval timing value for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-retry-params = /bits/ 16 <RIT RCT>;
			RIT:  Retry Interval Timer.
			RCT:  Rate Change Timer.

Optional properties:
  - ceva,broken-gen2: limit to gen1 speed instead of gen2.

Examples:
	ahci@fd0c0000 {
		compatible = "ceva,ahci-1v84";
		reg = <0xfd0c0000 0x200>;
		interrupt-parent = <&gic>;
		interrupts = <0 133 4>;
		clocks = <&clkc SATA_CLK_ID>;
		ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
		ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
		ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
		ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;

		ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
		ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
		ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
		ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
		ceva,broken-gen2;
	};

Support form 2021.1 release:

Binding for CEVA AHCI SATA Controller

Required properties:
  - reg: Physical base address and size of the controller's register area.
  - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.
  - clocks: Input clock specifier. Refer to common clock bindings.
  - interrupts: Interrupt specifier. Refer to interrupt binding.
  - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.
  - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
			CINMP : COMINIT Negate Minimum Period.
			CIBGN : COMINIT Burst Gap Nominal.
			CIBGMX: COMINIT Burst Gap Maximum.
			CIBGMN: COMINIT Burst Gap Minimum.
  - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.
  - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
			CWBGMN: COMWAKE Burst Gap Minimum.
			CWBGMX: COMWAKE Burst Gap Maximum.
			CWBGN: COMWAKE Burst Gap Nominal.
			CWNMP: COMWAKE Negate Minimum Period.
  - ceva,p0-burst-params: Burst timing value for COM parameter for port 0.
  - ceva,p1-burst-params: Burst timing value for COM parameter for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
			BMX: COM Burst Maximum.
			BNM: COM Burst Nominal.
			SFD: Signal Failure Detection value.
			PTST: Partial to Slumber timer value.
  - ceva,p0-retry-params: Retry interval timing value for port 0.
  - ceva,p1-retry-params: Retry interval timing value for port 1.
			The fields for the above parameter must be as shown below:
			ceva,pN-retry-params = /bits/ 16 <RIT RCT>;
			RIT:  Retry Interval Timer.
			RCT:  Rate Change Timer.

Optional properties:
  - ceva,broken-gen2: limit to gen1 speed instead of gen2.
  - phys: phandle for the PHY device
  - resets: phandle to the reset controller for the SATA IP

Examples:
	ahci@fd0c0000 {
		compatible = "ceva,ahci-1v84";
		reg = <0xfd0c0000 0x200>;
		interrupt-parent = <&gic>;
		interrupts = <0 133 4>;
		clocks = <&clkc SATA_CLK_ID>;
		ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
		ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
		ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
		ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;

		ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
		ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
		ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
		ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
		ceva,broken-gen2;
		phys = <&psgtr 1 PHY_TYPE_SATA 1 1>;
		resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
	};

Performance


The performance is noted by connecting SATA drive to ZCU102 board using hdparm tool. Use petalinux apps setup and edit makefile to install app into rootfs.
The hdparm tool can be downloaded from this link - http://sourceforge.net/projects/hdparm/

Timing buffered disk read = 456MB/sec
Note : Above results may vary from device to device

Test Procedure


Re-scan for devices from command line

echo "- - -" > /sys/class/scsi_host/host1/scan
echo "- - -" > /sys/class/scsi_host/host1/scan
 
ata1: exception Emask 0x10 SAct 0x0 SErr 0x190000 action 0xe frozen
 
ata1: irq_stat 0x00400000, PHY RDY changed
 
ata1: SError: { PHYRdyChg 10B8B Dispar }
 
ata1: hard resetting link
 
ata1: SATA link down (SStatus 0 SControl 320)
 
ata1: hard resetting link
 
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 320)
 
ata1.00: model number mismatch 'WDC WD10EZRX-00D8PB0' != 'TS128GSSD370'
 
ata1.00: revalidation failed (errno=-19)
 
ata1: limiting SATA link speed to 1.5 Gbps
 
ata1: hard resetting link
 
ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
 
ata1.00: model number mismatch 'WDC WD10EZRX-00D8PB0' != 'TS128GSSD370'
 
ata1.00: revalidation failed (errno=-19)
 
ata1.00: disabled
 
ata1: hard resetting link
 
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 320)
 
ata1.00: ATA-9: TS128GSSD370, 20140516, max UDMA/133
 
ata1.00: 250069680 sectors, multi 1: LBA48 NCQ (depth 31/32)
 
ata1.00: configured for UDMA/133
 
ata1: EH complete
 
ata1.00: detaching (SCSI 0:0:0:0)
 
sd 0:0:0:0: [sda] Synchronizing SCSI cache
 
sd 0:0:0:0: [sda] Stopping disk
 
scsi 0:0:0:0: Direct-Access     ATA      TS128GSSD370     0516 PQ: 0 ANSI: 5
 
sd 0:0:0:0: [sda] 250069680 512-byte logical blocks: (128 GB/119 GiB)
 
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
 
 sda: unknown partition table
 
sd 0:0:0:0: [sda] Attached SCSI disk

Sanity Testing
mkfs.vfat -F 32 /dev/sda
mount /dev/sda(1) /mnt
mkdir /mnt/sata
vi /mnt/sata/sata.txt
umount /mnt
 
 
 
dd if=/dev/urandom of=/tmp/data bs=1M count=10
dd if=/tmp/data of=/dev/sda bs=1M count=10
dd if=/dev/sda of=/tmp/data1 bs=1M count=10
md5sum /tmp/data /tmp/data1
 
 
(sha values reported by md5sum should be equal for data and data1 files
 
 

Expected O/P

[  114.970887] ahci-ceva fd0c0000.ahci: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0x3 impl platform mode
[  114.982333] ahci-ceva fd0c0000.ahci: flags: 64bit ncq sntf pm clo only pmp fbs pio slum part ccc sds apst
 
[  115.087894] scsi host0: ahci-ceva
[  115.125262] scsi host1: ahci-ceva
[  115.148929] ata1: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x100 irq 21
[  115.158564] ata2: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x180 irq 21
.......
[  115.527243] ata2: SATA link down (SStatus 0 SControl 310)
 
.......
 
[  115.737400] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 310)
[  115.753180] ata1.00: ATA-9: WDC WD10EZRX-00D8PB0, 80.00A80, max UDMA/133
[  115.761967] ata1.00: 1953525168 sectors, multi 0: LBA48 NCQ (depth 31/32)
[  115.779595] ata1.00: configured for UDMA/133
[  115.813492] scsi 0:0:0:0: Direct-Access     ATA      WDC WD10EZRX-00D 0A80 PQ: 0 ANSI: 5
[  115.882970] sd 0:0:0:0: [sda] 1953525168 512-byte logical blocks: (1.00 TB/931 GiB)
[  115.893109] sd 0:0:0:0: [sda] 4096-byte physical blocks
[  115.916793] sd 0:0:0:0: [sda] Write Protect is off
[  115.932641] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[  116.103856] m25p80 spi32765.0: unrecognized JEDEC id bytes: 00,  0,  0
[  116.337136] libphy: Fixed MDIO Bus: probed
[  116.417710] CAN device driver interface
[  116.555962] libphy: MACB_mii_bus: probed
[  116.700991]  sda:
[  116.770738] sd 0:0:0:0: [sda] Attached SCSI disk

Mainline status

The SATA driver is upstreamed into the mainline 5.4 kernel.
The new upstreamed psgtr driver-based, SATA driver is upstreamed into the mainline 5.13 kernel.

Phy Settings

The SATA Host Controller provides SATA connectivity for 1-2 external ports using the PS internal GT as PHY

Change Log

2016.3
  • None

2016.4
  • None

2017.1
Summary:
  • Added CCI support in SATA if "dma-coherent" flag is enabled in device-tree node
  • Corrected the sequence of AXI bus configuration register programming
  • Added Common Clock Framework for SATA
Commits:
1815f
69dcb

2017.2
  • None

2017.3
Summary:
  • Corrected suspend/resume logic for SATA
  • Added SMMU support for SATA IP
Commits:
a8e3b
398aa

2017.4
  • None

2018.1
Summary:
  • Merged 4.14 mainline kernel
Commits:

2018.2
Summary:
  • None


2018.3
Summary:
  • None


2019.1
Summary:
  • None

2019.2
Summary:

  • None

2020.1
Summary:

  • None

2020.2
Summary:

  • None

2021.1
Summary:

  • Update the driver to support xilinx GT phy based on new flow GT driver
  •  Updated code by using dev_err_probe

Note: This new psgtr configuration is applicable from release Xilinx - 2021.1.

Commits:

2021.2
Summary:

  • None