This page describes the Xilinx GMII2RGMII converter IP which can be found at /drivers/net/phy/xilinx_gmii2rgmii.c
This converter can be used with any MAC device, either axi ethernet or Zynq/Zynq Ultrascale+ MPSoC GEM.
Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.

HW IP features

• GMII2RGMII conversion

Features supported in driver

• GMII2RGMII conversion

Missing Features, Known Issues and Limitations

• None

Kernel Configuration

This following config option is required to enable this converter driver:
XILINX_GMII2RGMII

Devicetree

Complete devicetree documentation can be found here: https://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/net/xlnx%2Cgmii-to-rgmii.yaml

mdio {
    #address-cells = <1>;
    #size-cells = <0>;
    phy: ethernet-phy@0 {
        ......
    };
    gmiitorgmii: gmiitorgmii@8 {
        compatible = "xlnx,gmii-to-rgmii-1.0";
        reg = <8>;
        phy-handle = <&phy>;
		clocks = <&fixedplaceholder>;
		clock-names = "clkin";
    };
};

Test Procedure

This phy can be tested with any MAC using general ethernet test procedures like ping, iperf/netperf.
Refer to http://www.wiki.xilinx.com/Macb+Driver#Test Procedure

Mainline status

This driver is currently in sync with mainline except for the following diff:

• Clock adaption support (accepted on mainline net-next, expected to be in sync by 6.11)

2023.2

• Minor refcount leak fix

Commits

2024.1

Summary

• Add support for clock framework adaption

Commits

https://github.com/Xilinx/linux-xlnx/commits/xilinx-v2024.1/drivers/net/phy/xilinx_gmii2rgmii.c

2023.1

None

2022.2

No changes

2022.1

No changes

2021.2

No changes

2021.1

Summary

No changes

Commits:

(No changes)

https://github.com/Xilinx/linux-xlnx/commits/xilinx-v2021.1/drivers/net/phy/xilinx_gmii2rgmii.c

2020.2

Summary

Minor warning fix

Commits:

https://github.com/Xilinx/linux-xlnx/commits/xilinx-v2020.2/drivers/net/phy/xilinx_gmii2rgmii.c

2020.1

Summary

Minor bugfix to sync priv field usage with mainline driver

Commits:

https://github.com/Xilinx/linux-xlnx/commits/xilinx-v2020.1/drivers/net/phy/xilinx_gmii2rgmii.c

2019.2

Summary

• Bug fixes

Commits:

b145197 net: gmii2rgmii: do not attach if phy has a priv field

a233487 net: gmii2rgmii: Switch priv field in mdio device structure

• Bug fixes

Commits:

316b316 net: phy: xgmiitorgmii: Use correct mdio bus
ce6851a net: phy: xgmiitorgmii: Check read_status results

• Enable gmii2rgmii in ZynqMP defconfig and fix an error when external phy driver is not registered.

• Bugfix