The page describes the configuration process and usage of the U-Boot i2c driver used on Zynq-7000 and Zynq Ultrascale+.

Table of Contents

Introduction

The I2C module is a bus controller that can function as a master or a slave in a multi-master design. It supports a wide clock frequency range up to 400 Kb/s. The controller supports multi-master mode for 7-bit and extended addressing modes.

U-boot Configuration

For ZynqMP

CONFIG_SYS_I2C_ZYNQ
CONFIG_SYS_I2C_ZYNQ_SLAVE
CONFIG_SYS_I2C
CONFIG_ZYNQ_I2C0
CONFIG_ZYNQ_I2C1
CONFIG_CMD_I2C

For I2C Cadence

CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_I2C=y
CONFIG_CMD_I2C=y

For Zynq

CONFIG_ZYNQ_I2C0=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_SYS_I2C_ZYNQ_SLAVE 0
CONFIG_SYS_I2C_MUX_ADDR 0x74
CONFIG_SYS_I2C=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=y
CONFIG_SYS_I2C_EEPROM_ADDR 0x54
CONFIG_SYS_I2C_MUX_EEPROM_SEL 0x4
CONFIG_SYS_I2C_ZYNQ_SPEED 100000
CONFIG_CMD_I2C=y

Device Tree

Device tree entry for I2C

&&i2c1 {
       status = "okay";
       clock-frequency = <400000>;
       pinctrl-names = "default", "gpio";
       pinctrl-0 = <&&pinctrl_i2c1_default>;
       pinctrl-1 = <&&pinctrl_i2c1_gpio>;
       scl-gpios = <&&gpio 36 GPIO_ACTIVE_HIGH>;
       sda-gpios = <&&gpio 37 GPIO_ACTIVE_HIGH>;
 
       eeprom@55 {
               compatible = "at,24c64"; /* 24AA64 */
               reg = <0x55>;
       };
};

Test Procedure

Writes different patterns to the I2C EEPROM, reads back the contents of the EEPROM and performs data verification.

ZynqMP> i2c bus
Bus 0: i2c@ff020000
ZynqMP> i2c dev 0
Setting bus to 0
ZynqMP> i2c speed
Current bus speed=400000
ZynqMP> i2c probe
Valid chip addresses: 00 0A 0B 0D 0E 0F 10 11 12 13 14 15 16 17 18 1A 1B 1C 1D 1E 20 50 68 70 71 72 73 74 75 76
ZynqMP> md.b 100000
ZynqMP> mw.b 100000 cc 10
ZynqMP> md.b 100000
ZynqMP> md.b 200000
ZynqMP> i2c write 100000 50 0.1 10
ZynqMP> i2c read 50 0.1 10 200000
ZynqMP> md.b 200000

I2C controller Features

Zynq Ultrascale+

The processing system (PS) supports I2C devices with these key features.

I2C bus specification version 2
16-byte FIFO
Programmable normal and fast bus data rates
Multi master support

Zynq-7000

The PS supports two I2C devices with these key features:

I2C bus specifications version 2
Supports 16-byte FIFO
Programmable normal and fast bus data rates
Master mode
Write transfer
Read transfer
Extended address support
Support HOLD for slow processor service
Supports TO interrupt flag to avoid stall condition
Slave monitor mode

Xilinx Wiki

U-Boot I2C Driver