Zynq-7000 AP SoC - Precision Timing with IEEE1588 v2 Protocol Tech Tip

Zynq-7000 AP SoC - Precision Timing with IEEE1588 v2 Protocol Tech Tip

 

Zynq-7000 AP SoC - Precision Timing with IEEE1588 v2 Protocol Tech Tip

 

Table of Contents

Document History

Summary

Implementation

Block Diagram

Step by Step Instructions

Expected Results

How to Expand

Appendix A: IEEE 1588v2 PTP Overview

Document History

Date

Version

Author

Description of Revisions

5th Mar, 2014

0.1

Upender Cherukupally

Initial version

30th Jun, 2017

-

-

Obsoleted (see implementation details)

Summary



The IEEE 1588 standard describes the protocol which synchronizes the system clocks of the different connected devices. Nanosecond level clock synchronization among connected devices is one of the primary requirements for many applications in automation, motion control, consumer electronics, Audio Video broadcasting (AVB) and telecommunications market segments. Achieving this timing requirement requires robust, responsive and error-free design and implementations in both software and hardware design.


Zynq-7000 AP SoC has inbuilt hardware support for the IEEE1588v2 Precision Time Protocol (PTP) time stamping for the Gigabit Ethernet MACs (GEM). The GEM in Zynq has support for detecting PTP messages, seconds’ counters, nanoseconds counters and registers for PTP specific configuration like the interrupts support for PTP messages etc. to meet all the hardware assisted time stamping requirements of the PTP. Zynq-7000 AP SoC has two hardened Time Stamping Units (TSUs) for both the GEMs in Processing System. These two TSUs will work independently to each other. Refer to sections 16.2.7 IEEE1588 Time stamping unit and 16.4 IEEE1588 Time stamping in Zynq Technical Reference Manual (TRM) for more details on the PTP TSUs in Zynq-7000 AP SoC.

This TechTip covers the following topics:

  1. Details of IEEE1588 PTP Reference design using the Zynq-7000 AP SoC

  2. Open Source Linux API support for PTP and kernel configuration

  3. Linux implementation of IEEE1588 PTP (LinuxPTP)

  4. Steps to create the Zynq-7000 AP SoC PS GEM with TSU design using the Vivado design tool

  5. Creating the First Stage Boot Loader (FSBL), boot.bin files for the Zynq design created in above step

  6. Linux kernel driver changes specific to this design and Using the SDK for building the LinuxPTP applications

  7. Running the PTP time stamping & synchronization on two Zynq-7000 AP SoC boards: One is acting as PTP master and other will be acting as PTP slave

  8. Expected results & How to expand the design



Implementation

Implementation Details

Design Type

PS

SW Type

Zynq-7000 AP SoC Linux, LinuxPTP application

CPUs

1 ARM Cortex-A9

PS Features

  • DDR3

  • Cache

  • L1 and L2 Cache

  • OCM

  • Gigabit Ethernet MAC with Time stamping unit

PL Cores


Boards/Tools

Two boards either ZC702 or ZC706

Xilinx Tools Version

Vivado 2013.4

Other Details

This tech tip is obsolete for multiple reasons including:

  • PS EMAC driver is no longer supported

  • Known issues around 1588 support using the PS GEMs

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