Zynq-7000 AP SoC Boot & Config

This page highlights the boot and config capabilities of the Zynq-7000 SoC.

Resources

Zynq Book
Zynq Training
Xilinx Zynq-7000 SoC Solution Center
Zynq-7000 SoC Software Developers Guide

• Provides basic intro into Zynq booting, FSBL, boot flow, fallback and security

Zynq-7000 SoC: Concepts, Tools, and Techniques (CTT)

• Goes through entire embedded flow with examples

OS and Libraries Document Collection

• Documentation of some Zynq Libraries

UltraFast Embedded Design Methodology Guide

• Covers all basics and some topics in depth for embedded design

Embedded System Tools Reference Manual

• Describes the architecture of the embedded system tools and flows for Xilinx tools

How to Build a Linux Boot Image for the Zynq-7000 SoC

• Learn how to build the FSBL, U-boot, Linux and make a bootable image for the Zynq-7000 programmable SoC

How to Create Zynq Boot Image using Xilinx SDK

• Learn how to create Zynq Boot Image using the Xilinx SDK. We'll review the boot parameters and partitions that can be selected/added while creating a Zynq Boot Image through the Xilinx SDK

Guides

Zynq-7000 SoC Secure Boot
Secure Boot in the Zynq-7000 SoC
Zynq-7000 SoC Technical Reference Manual
Build U-Boot
U-Boot Secondary Program Loader

Build FSBL

• Describes how to build the First Stage Boot Loader (FSBL) for your target platform

Prepare boot image

• Describes the process of creating a boot image for Zynq

Prepare Boot Medium

• describes the process of preparing a medium as boot device

App Notes & White Papers

XAPP1078 Latest Information
XAPP1079 Latest Information
Partial Reconfiguration of a Hardware Accelerator on Zynq-7000 SoC Devices
Secure Boot of Zynq-7000 SoC

Tech Tips & How To's

Zynq-7000 SoC Boot - Multiboot

• Shows how multiboot works using the QSPI

Zynq-7000 SoC Boot - Rebooting to a Different Boot Image and Bitstream from Linux

• Shows how to boot up in 2 modes using the same boot device

Zynq-7000 SoC Boot - Booting and Running Without External Memory

• Shows how to boot and run with a DDR less system

Zynq-7000 SoC - 32 Bit DDR Access with ECC Tech Tip
Zynq-7000 SoC - Base TRD execution from 32 Bit ECC Proxy System Tech Tip
Zynq-7000 SoC - Using BRAM for Additional On-Chip Memory Tech Tip
Zynq-7000 SoC Boot - Locking and Executing out of L2 Cache Tech Tip

Targeted Reference Designs

Zynq-7000 SoC ZC702 Base Targeted Reference Design
ZC706 PCIe Targeted Reference Design
7 Series FPGA AMS Target Reference Design
K7 Embedded TRD 2013.2
Zynq Base TRD 14.1
Zynq Base TRD 14.2
Zynq Base TRD 14.3
Zynq Base TRD 14.4
Zynq Base TRD 14.5
Zynq Base TRD 2013.2
Zynq Base TRD 2013.3
Zynq Base TRD 2013.4
Zynq Base TRD 2014.2
Zynq PCIe TRD 14.3
Zynq PCIe TRD 14.4
Zynq PCIe TRD 14.5
Zynq PCIe TRD 14.6
ZYNQ_PCIe_TRD_14.7

Related Links

• Zynq-7000 SoC Getting Started
• Zynq-7000 SoC Demonstrations & Boards and Kits
• Zynq-7000 SoC Development & Debug
• Zynq-7000 SoC Boot & Config
• Zynq-7000 SoC Operating Systems
• Zynq-7000 SoC Power Management
• Zynq-7000 SoC Performance and Benchmarks
• Zynq-7000 SoC Software Acceleration
• Zynq-7000 SoC Real-Time & Data Movement
• Zynq-7000 SoC Peripherals, IP & Drivers
• Zynq-7000 SoC Security & Safety

Exclusive Resources

Please contact your local Xilinx sales representative for the following competitive benchmark information:

• Zynq-7000 SoC Booting Presentation
• Understanding the Zynq-7000 SoC FSBL
• Software Platform Download and Boot
• Zynq-7000 SoC Boot and Config Technical Module