Xilinx V4L2 TPG driver
Table of Contents
Introduction
The purpose of this page is to describe the Linux V4L2 drivers for Xilinx Test Pattern Generator (TPG) and Xilinx Video Timing Controller (VTC) soft IPs.
The Linux TPG driver (xilinx-tpg.c) is based on the V4L2 framework, and creates a subdev node(/dev/v4l-subdev*) which can be used to configure the TPG IP core. If the TPG's video timing interface is enabled and connected to a VTC-Generator, the Linux VTC driver (xilinx-vtc.c) is included as well. The general description of V4L2 framework is documented here.
The following TPG features are supported including:
- Configuring resolutions
- Configuring video formats: RGB, YUV422, YUV444, Bayer
- Bayer format is NOT supported in HLS based TPG IP core v7.0 onwards
- Changing test patterns using V4L2 controls: Ramp, solid color, color bars, checker board...
- Configuring patterns: cross hair, moving box, motion speed, stuck pixel, noise level...
- Configure timing - optional, if VTC interface is enabled and connected
IP/Driver Features
IP features | 2018.1 to 2018.3 | 2019.1 |
---|---|---|
IP version | 7.0 | 8.0 |
Compatible | xlnx,v-tpg-5.0 | xlnx,v-tpg-8.0 (2023.1 and above) |
Color bars | Yes | |
Zone plate with adjustable sweep and speed | Yes | |
Temporal and spatial ramps | Yes | |
Moving box with selectable size and color over any available test pattern | Yes | |
RGB, YUV 444, YUV 422, YUV 420 | Yes | |
AXI4-Stream data interfaces | Yes | |
AXI4-Lite control interface | Yes | |
Supports 8, 10, 12, and 16-bits per color component input and output | Supports only 8 bpc media formats | Supports 8 and 10 bpc media bus formats |
Resolutions supported | Max 8192 x 4320, Min 64 x 64 | Max 10328 x 7760, Min 64 x 64** |
Interlaced Video Support | No | Yes in IP. No in driver. |
Missing Features / Know limitations / Issues in Driver
- *Tested for 8 and 10 bpc color formats only
- **Tested for up to 3840x2160. In pass through mode, the max resolution supported will be 8192 x 8192 (VTC max resolution). Not tested.
- Motion enabled color bar pattern not added to list
- Dynamic Range of DisplayPort color square definition in RGB (VESA / CEA) not supported.
- Coefficients of DisplayPort color square definition in YUV (601/709) not supported.
Kernel Configuration
CONFIG_VIDEO_XILINX_TPG and CONFIG_VIDEO_XILINX should be enabled.
If the TPG's video timing interface is enabled and connected to a VTC-Generator CONFIG_VIDEO_XILINX_VTC should be enabled.
Device Tree Binding
The dts nodes should be defined with correct hardware configuration. How to define the nodes is documented here, xlnx,v-tpg.txt and here, xlnx-v-tc.txt
Test Procedure
This has been tested using media-ctl and yavta utilities.
root@zcu102-zynqmp:~# yavta -l /dev/v4l-subdev0 Device /dev/v4l-subdev0 opened. --- User Controls (class 0x00980001) --- control 0x0098c903 `Test Pattern: Color Mask' min 0 max 7 step 0 default 0 current 0. control 0x0098c907 `Test Pattern: Motion Speed' min 0 max 255 step 1 default 4 current 4. control 0x0098c908 `Test Pattern: Cross Hairs Row' min 0 max 4095 step 1 default 100 current 100. control 0x0098c909 `Test Pattern: Cross Hairs Colum' min 0 max 4095 step 1 default 100 current 100. control 0x0098c90a `Test Pattern: Zplate Horizontal' min 0 max 65535 step 1 default 30 current 30. control 0x0098c90b `Test Pattern: Zplate Horizontal' min 0 max 65535 step 1 default 0 current 0. control 0x0098c90c `Test Pattern: Zplate Vertical S' min 0 max 65535 step 1 default 1 current 1. control 0x0098c90d `Test Pattern: Zplate Vertical S' min 0 max 65535 step 1 default 0 current 0. control 0x0098c90e `Test Pattern: Box Size' min 0 max 4095 step 1 default 50 current 50. control 0x0098c90f `Test Pattern: Box Color(RGB/YCb' min 0 max 16777215 step 1 default 0 current 0. control 0x0098c912 `Test Pattern: Foreground Patter' min 0 max 2 step 1 default 0 current 0. 0: No Overlay (*) 1: Moving Box 2: Cross Hairs --- Image Source Controls (class 0x009e0001) --- control 0x009e0901 `Vertical Blanking' min 3 max 8159 step 1 default 100 current 100. control 0x009e0902 `Horizontal Blanking' min 3 max 8159 step 1 default 100 current 100. --- Image Processing Controls (class 0x009f0001) --- control 0x009f0903 `Test Pattern' min 0 max 16 step 1 default 9 current 9. 1: Horizontal Ramp 2: Vertical Ramp 3: Temporal Ramp 4: Solid Red 5: Solid Green 6: Solid Blue 7: Solid Black 8: Solid White 9: Color Bars (*) 10: Zone Plate 11: Tartan Color Bars 12: Cross Hatch 13: Color Sweep 14: Vertical/Horizontal Ramps 15: Black/White Checker Board 16: PseudoRandom 14 controls found. Unable to get format: Inappropriate ioctl for device (25).
Known Issues
- AR54536 - LogiCORE IP Test Pattern Generator (TPG) - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions
Change log
2024.2
- No changes
2024.1
- No changes
2023.2
- Summary
- fa3cd0 v4l: xilinx: tpg: Fix warnings for CHECKED_RETURN
- f5212f v4l: xilinx: tpg: Fix warnings for NULL_RETURNS
- 6cfb02 v4l: xilinx: tpg: Don't read version if HLS IP
- 9e89bc v4l: xilinx: tpg: Use 10bit media bus codes
- 57d1de media: xilinx: tpg: Add support for v8.0
- 4c66b8 media: xilinx: tpg: dt pixel per clock validate.
- 84be17 media: xilinx: vtc: Dynamically calculate pixel clock
- 2ec40c media: xilinx: tpg: v4l subdevice controls to set fps
- 2b8a05 media: xilinx: tpg: Add pixel per clock dt support
- b3ad3c v4l: xilinx: tpg: Add check for max width and heigh
- b3ad3c v4l: xilinx-tpg: Add YUV 420 media bus format support to TPG drive
- 3e28d8 v4l: xilinx-tpg: Add YUV 420 media bus format support to TPG driver
- 81044b media: xilinx: Refactor VTC configuration code
- f70894 media: xilinx: tpg: Block comments
- 19ff7c media: xilinx: Integrate TPG v7 support
2023.1
- Summary
- 993bfd media: xilinx-tpg: Convert to platform remove callback returning void
2022.2
- No changes
2022.1
- No changes
2021.2
- Summary
- 0d346d media: v4l2-subdev: add subdev-wide state struct
2020.2
- Summary
- Don't read IP version register if HLS IP
- Commits
- v4l: xilinx: tpg: Don't read version if HLS IP
2020.1
- Summary
- No changes
2019.2
- Summary
- No changes
2019.1
- Summary
- Dynamically modify TPG output format
- Add support for 10bpc media bus formats
- Add support v8.0 compatible string
- Make max width and height mandatory properties
- Validate pixels per clock from device tree for 2, 4 and 8 values.
- Dynamically allow VTC to calculate required clock frequency based on frame rate
- Add support for dynamically setting frame rate through v4l2 framework
- Add support for pixels per clock.
- Commits
973a4f3 v4l: xilinx: tpg: Dynamically modify TPG output format
558c4a1 v4l: xilinx: tpg: Use 10bit media bus codes
f3a6bdc media: xilinx: tpg: Add support for v8.0
14ad60e media: xilinx: tpg: dt pixel per clock validate.
a99e5d9 media: xilinx: vtc: Dynamically calculate pixel clock
a304cdf media: xilinx: tpg: v4l subdevice controls to set fps
868ea3c media: xilinx: tpg: Add pixel per clock dt support
2018.3
- Summary
- Add check for max width and height
- Commits
- 3b5709e v4l: xilinx: tpg: Add check for max width and height
2018.2
- Summary
- No changes
2018.1
- Summary
- Add YUV420 media bus format support
- Commits
2017.4
- Summary
- No change
2017.3
- Summary
- Block comments and constify v4l-subdev structs
- Commits
2017.2
- Summary
- No change
2017.1
- Sumary
- No change
2016.4
- Summary
- No change
2016.3
- Summary
- No change
- Commits
- ef0a1fd Merge tag 'v4.5' into master
2016.2
- Summary
- No change
2016.1
- Summary
- Minor bug fixes
- Add menu based control for foreground pattern
- Use media bus format definitons
- Use GPIO to reset TPG
- Commits
b4c4c7f media: xilinx: Fix "maybe used uninitialized" warning
6fb901b Merge tag 'v4.1' into xilinx/master
ab22e77 [media] media framework: rename pads init function to media_entity_pads_init()
1809510 [media] media: get rid of unused "extra_links" param on media_entity_init()
c89b053 media: xilinx: Fix TPG incorrect pattern on resolution switch
493b602 media: xilinx: Use GPIO to assert TPG reset
3416ea3 media: xilinx: Skip checking bayer phase
507daf8 media: xilinx: Make use of MEDIA_BUS_FMT definitions
aa508c7 media: xilinx: Add "Pseudorandom" pattern support
ba94b83 media: xilinx: Use xvip_write to update background pattern
561392b media: xilinx: Remove HLS based v4l2_ctrl_ops
bd2f3fa media: xilinx: Create menu based control for foreground pattern
852861e media: xilinx: Correct color mask control max value
473f5bc media: xilinx: Fix coding style
2015.4
- Summary
- Add support for TPG v7
- Other minor bug fixes and code refactor for VTC configuration
- Commits
c8087d7 media: xilinx: Fix TPG moving box and cross-hair states
993dddf media: xilinx: Set correct HLS color mask range
1559fc0 media: xilinx: Fix TPGv7 controls configuration
cc331d3 [media] v4l: xilinx-tpg: add missing of_node_put
ad33f9c media: xilinx: Integrate TPG v7 support
b8d6a42 media: xilinx: Refactor VTC configuration code
2015.3
- Summary
- No change
2015.2
- Summary
- Added the new TPG driver
- Commits
2015.1
- Summary
- Minor Bug fixes
- Commits
2014.4
No change
2014.3
- Summary
- Default to color bars test pattern
- Minor bug fixes
- Commits
40252c0 xilinx: Remove .owner field for drivers
1995efb media: xilinx: Move and rename xilinx v4l2 controls header file
22d2fcc media: xilinx: tpg: Ignore unconnected input ports
ed9e7cd media: xilinx: tpg: Make horizontal and vertical blanking configurable
b4f6511 media: xilinx: tpg: Disallow switching passthrough mode during streaming
887e5ae media: xilinx: tpg: Default to the color bars test pattern
2014.2
No change
2014.1
- Summary
- Multiple bug fixes
- Add VTC support and video timing mux support
- Commits
- 03ef0e8 media: xilinx: tpg: Add video timing mux support
- cad4f22 media: xilinx: tpg: Add VTC support
- 207b222 media: xilinx: tpg: Move control IDs to xilinx-controls.h
- dea7505 media: xilinx: tpg: Include the format infomation in 'port' node
- 63b2e13 media: xilinx: tpg: Allocate active formats for each pad
- 0a70111 media: xilinx: tpg: Configure the bayer phase
- f44d7f5 media: xilinx: tpg: Make number of pads dynamic
- 4ecd116 media: xilinx: tpg: Fix devm_ioremap_resource() return value check
- 2f7b096 media: xilinx: tpg: Remove of_match_ptr()
- 5103a10 media: xilinx: tpg: Add power management functions
- 4909a78 media: xilinx: tpg: Use xvip_print_version()
- dc9ae7f media: xilinx: tpg: Use xvip_set_frame_size()
- 6537a9d media: xilinx: tpg: Use xvip_stop()
- ecf0cef media: xilinx: tpg: Use xvip_start()
- 30ed42b media: xilinx: tpg: Use xvip_set_format_size()
- 1c113b4 media: xilinx: tpg: Use xvip_enum_frame_size()
- c38eb2f media: xilinx: tpg: Use xvip_enum_mbus_code()
- c1de2eb media: xilinx: tpg: Fix the structure comment
- a6610f9 media: xilinx: tpg: Fix alignments
- 97d662b media: xilinx: tpg: Change 'format' to 'fmt'
- dd2bf93 media: xilinx: tpg: Fix alignments around __xtpg_get_pad_format()
- f59c7bd7 media: xilinx: tpg: Add the default format
- b5173f1 media: xilinx: tpg: Add controls for TPG
- 6abe592 media: xilinx: tpg: Reset in probe()
- 9bdec3d media: xilinx: tpg: Use <linux/device.h> instead of <linux/slab.h>
- 1e70280 media: xilinx: tpg: Add the version number in DT compatible string
- a7fd423 media: xilinx: vip: Change the return value of xvip_of_get_format()
- 86d3953 media: xilinx: vip: Remove _TIMING_ from register definition
2013.4
- Summary
- Initial driver is added
- Commit
- 5356df1 v4l: xilinx: Add Test Pattern Generator driver