Zynq UltraScale+ MPSoC VCU TRD 2021.1 - PL DDR HDR10 HDMI Video Capture and Display

Owned by Ronak Shah (Unlicensed)
Last updated: Jun 23, 2021 by Nayan Bhavsar
14 min read

This page provides all the information related to Design Module 6 - VCU TRD PL DDR HDR10 HDMI design.

Table of Contents

1 Overview

This module supports the reception and insertion of HDR10 static metadata for HDMI. This HDR10 metadata that contains critical information needed to support HDR will be carried throughout the pipeline - from the source to the sink. It enables the capture of HDR10 video from an HDMI-Rx Subsystem implemented in the PL. The video can be displayed through HDR10 compatible HDMI-Tx through the PL and recorded in SD cards or USB/SATA drives. The module can Stream-in or Stream-out HDR10 encoded data through an Ethernet interface. This module supports single-stream for XV20 and XV15 format. It also supports DCI 4k (4096 x 2160) resolution at 60 FPS.

This is the new design approach proposed to use PL_DDR for decoding and PS_DDR for encoding so that DDR bandwidth would be enough to support high bandwidth VCU applications requiring simultaneous encoder and decoder operations and transcoding at 4k@60 FPS. This approach makes the most effective use of limited AXI4 read/write issuance capability in minimizing latency for the decoder. DMA buffer sharing requirements determine how capture, display, and intermediate processing stages should be mapped to the PS or PL DDR.

Selection of the PL DDR into the design needs based on the revision of the zcu106 board.

This design supports the following video interfaces:
Sources:

  • HDMI-Rx capture pipeline implemented in the PL.

  • File source (SD card, USB storage, SATA hard disk).

  • Stream-In from network or internet.

Sinks:

  • HDMI-Tx display pipeline implemented in the PL.

VCU Codec:

  • Video Encode/Decode capability using VCU hard block in PL 

    • AVC/HEVC encoding

    • Encoder/decoder parameter configuration.

Video format:

  • XV20, XV15

Supported Resolution:

The table below provides the supported resolution from the command line app only in this design.

Resolution

Command Line

Single Stream

Multi-stream

4kp60

√

NA

4kp30

√

x

1080p60

√

x

√ - Supported
x – Not supported
NA – Not applicable

The below table gives information about the features supported in this design. 

Pipeline

Input source

Format

Output Type

Resolution

VCU codec

Pipeline

Input source

Format

Output Type

Resolution

VCU codec

Serial pipeline

HDMI-Rx

XV20/ XV15

HDMI-Tx

DCI-4kp60/ 4kp60/ 4kp30/ 1080p60

HEVC/ AVC

Record/ Stream-Out pipeline

HDMI-Rx

XV20/ XV15

File Sink/ Stream-Out

DCI-4kp60/ 4kp60/ 4kp30/ 1080p60

HEVC/ AVC

File/ Streaming Playback pipeline

File Source/ Stream-In

XV20/ XV15

HDMI-Tx

DCI-4kp60/ 4kp60/ 4kp30/ 1080p60

HEVC/ AVC


The below figure shows the PL DDR HDR10 HDMI design hardware block diagram.

The below figure shows the PL DDR HDR10 HDMI design software block diagram.

1.1 Board Setup

Refer below link for Board Setup

1.2 Run Flow

The TRD package is released with the source code, Vivado project, Petalinux BSP, and SD card image that enables the user to run the demonstration. It also includes the binaries necessary to configure and boot the ZCU106 board. Prior to running the steps mentioned in this wiki page, download the TRD package and extract its contents to a directory referred to as TRD_HOME which is the home directory.

Refer below link to download all TRD contents.

TRD package contents are placed in the following directory structure. The user needs to copy all the files from the $TRD_HOME/images/vcu_plddrv1_hdr10_hdmi/ or $TRD_HOME/images/vcu_plddrv2_hdr10_hdmi/ to FAT32 formatted SD card directory.

rdf0428-zcu106-vcu-trd-2021-1/ ├── apu │ └── vcu_petalinux_bsp ├── images │ ├── vcu_10g │ ├── vcu_audio │ ├── vcu_llp2_hdmi_nv12 │ ├── vcu_llp2_hdmi_nv16 │ ├── vcu_llp2_hdmi_xv20 │ ├── vcu_llp2_sdi_xv20 │ ├── vcu_multistream_nv12 │ ├── vcu_pcie │ ├── vcu_plddrv1_hdr10_hdmi │ ├── vcu_plddrv2_hdr10_hdmi │ └── vcu_sdi_xv20 ├── pcie_host_package │ ├── COPYING │ ├── include │ ├── LICENSE │ ├── readme.txt │ ├── RELEASE │ ├── tests │ ├── tools │ └── xdma ├── pl │ ├── constrs │ ├── designs │ ├── prebuild │ ├── README.md │ └── srcs └── README.txt └── zcu106_vcu_trd_sources_and_licenses.tar.gz

TRD package contents specific to PL DDR v1 HDR10 HDMI design are placed in the following directory structure.

rdf0428-zcu106-vcu-trd-2021-1 ├── apu │   └── vcu_petalinux_bsp │   └── xilinx-vcu-zcu106-v2021.1-final.bsp ├── images │   ├── vcu_plddrv1_hdr10_hdmi │   │   ├── autostart.sh │   │   ├── BOOT.BIN │   │   ├── boot.scr │   │   ├── config │   │   ├── Image | | ├── rootfs.cpio.gz.u-boot │   │   ├── system.dtb │   │   └── vcu ├── pcie_host_package ├── pl │   ├── constrs │ ├── designs │   │   └── zcu106_HDR10_DCI4K │   ├── prebuild │   │   └── zcu106_HDR10_DCI4K │   ├── README.md │   └── srcs │   ├── hdl │   └── ip └── README.txt └── zcu106_vcu_trd_sources_and_licenses.tar.gz

TRD package contents specific to PL DDR v2 HDR10 HDMI design are placed in the following directory structure.

rdf0428-zcu106-vcu-trd-2021-1 ├── apu │   └── vcu_petalinux_bsp │   └── xilinx-vcu-zcu106-v2021.1-final.bsp ├── images │   ├── vcu_plddrv2_hdr10_hdmi │   │   ├── autostart.sh │   │   ├── BOOT.BIN │   │   ├── boot.scr │   │   ├── config │   │   ├── Image | | ├── rootfs.cpio.gz.u-boot │   │   ├── system.dtb │   │   └── vcu ├── pcie_host_package ├── pl │   ├── constrs │ ├── designs │   │   └── zcu106_HDR10_DCI4K │   ├── prebuild │   │   └── zcu106_HDR10_PLDDR_2_0 │   ├── README.md │   └── srcs │   ├── hdl │   └── ip └── README.txt └── zcu106_vcu_trd_sources_and_licenses.tar.gz

The below snippet shows the configuration files (input.cfg) for running various resolutions for Display, Record, and Streaming use cases. All these configurations files are placed in the images folder mentioned above. The directory structure in /media/card.

1.2.1 GStreamer Application (vcu_gst_app)

The vcu_gst_app is a command-line multi-threaded Linux application. The command-line application requires an input configuration file (input.cfg) to be provided in the plain text.

Run below modetest command to set CRTC configurations for 4Kp60:

Run below modetest command to set CRTC configurations for 4Kp30:

Execution of the application is shown below:

Examples:

4kp60 XV20 HEVC_HIGH HDR10 Display Pipeline execution

4kp60 XV20 HEVC_HIGH HDR10 Record Pipeline execution

4kp60 XV20 HEVC_HIGH HDR10 Stream-out Pipeline execution

4kp60 XV20 HEVC_HIGH HDR10 Stream-in Pipeline execution

Make sure HDMI-Rx should be configured to 4kp60 mode

To measure the latency of the pipeline, run the below command. The latency data is huge, so dump it to a file.

Refer below link for detailed run flow steps

1.3 Build Flow

Refer below link for detailed build flow steps

NOTE: New ZCU_106 Boards are assembled with PLDDR part “MT40A256M16LY-062E:F”.

To configure the VCU DDR4 Controller IP with new PLDDR part,

select “MT40A256M16LY-062E:F” from the “Memory part” drop down menu as shown in below image

 

 

2 Other Information

2.1 Known Issues

2.2 Limitations

2.3 Optimum VCU Encoder parameters for use-cases.

Video streaming:

  • Video streaming use-case requires a very stable bitrate graph for all pictures.

  • It is good to avoid periodic large Intra pictures during the encoding session

  • Low-latency rate control (hardware RC) is the preferred control-rate for video streaming, it tries to maintain equal amount frame sizes for all pictures.

  • Good to avoid periodic Intra frames instead use low-delay-p (IPPPPP…)

  • VBR is not a preferred mode of streaming.

Performance: AVC Encoder settings:

  • It is preferred to use 8 or higher slices for better AVC encoder performance.

  • AVC standard does not support Tile mode processing which results in the processing of MB rows sequentially for entropy coding.

Quality: Low bitrate AVC encoding:

  • Enable profile=high and use qp-mode=auto for low-bitrate encoding use-cases

  • The high profile enables 8x8 transform which results in better video quality at low bitrates.

3 Appendix A - Input Configuration File (input.cfg)

The example configuration files are stored at /media/card/config/ folder.

Configuration Type

Configuration Name

Description

Available Options

Configuration Type

Configuration Name

Description

Available Options

Common

 

Common Configuration

It is the starting point of common configuration

 

Num of Input

Provide the number of inputs. Set to 1 as it supports only single stream

1

Output

Select the video interface

HDMI

Out Type

Type of output

display, record, stream

Display Rate

Pipeline frame rate

30 or 60 fps

Exit

It indicates to the application that the configuration is over

 

Input

Input Configuration

It is the starting point of the input configuration

 

Input Num

Starting Nth input configuration

1

Input Type

Input source type

HDMI, File, Stream

Uri

File path or Network URL. Applicable for file playback and stream-in pipeline only. Supported file formats for playback are ts, mp4, and mkv.

file:///run/media/sda/abc.ts (for file path), udp://192.168.25.89:5004/ (for Network streaming, Here 192.168.25.89 is Client's IP address and 5004 is port number)

Raw

To tell the pipeline is processed or pass-through