ZynqMP PMU Firmware Code Size Management
Mohan Marutirao Dhanawade
Introduction
ZynqMP PMU module has limited in-built memory of 128KB. ZynqMP provides a lot of features for the user to choose based on the customer application. These all features can't fit into 128KB memory. So Xilinx recommends to use following features to reduce the code size of PMU and fit it into 128KB.
Code Optimization
Xilinx uses following compiler options to optimize the code. Don't disable these compiler options.
Compiler options
-Os -flto -ffat-lto-objects
Code Selection
The user can enable/disable following features. When the user enables the feature, it adds the code of that feature to PMU firmware. Following table gives the list of features available for inclusion/exclusion from PMU firmware and memory each feature occupies if included in PMU firmware. The macro names used to enable/disable the feature is given in bracket under PMU feature column. For example to enable CRC for IPI communication macro ENABLE_IPI_CRC_VAL should be set to 1U, to disable XilFpga macro FPGA_LOAD_VAL should be set to 0U. These macros are defined in PMU firmware file xpfw_config.h.
# | PMU Feature | Default Option | Dependency | ~Size in KB | ||
|---|---|---|---|---|---|---|
| 2018.3 | 2019.1 | 2019.2 | ||||
| 1 | Basic PMUFW (All macros Disabled) | 15.8515625 | 20.3906 | |||
| 2 | Error Manager (ENABLE_EM_VAL) | Disabled | 3.1640625 | 3.0625 | ||
| 3 | Scheduler (ENABLE_SCHEDULER_VAL) | Disabled | 0.328125 | 0.29688 | ||
| 4 | XilFpga (ENABLE_FPGA_LOAD_VAL) | Enabled | Power Management (ENABLE_PM_VAL) XilSecure (ENABLE_SECURE_VAL) | 9.6328125 | 9.171855 | |
| 5 | XilSecure (ENABLE_SECURE_VAL) | Enabled | Power Management (ENABLE_PM_VAL) | 21.9296875 | 20.2813 | |
| 6 | STL (ENABLE_STL_VAL) (Register Coverage) | Disabled | Power Management (ENABLE_PM_VAL) | 4.921875 | 4.75781 | |
| 7 | WDT(ENABLE_WDT_VAL) | Disabled | Scheduler (ENABLE_SCHEDULER_VAL) | 1.1171875 | 1.03125 | |
| 8 | CRC for IPI communication (ENABLE_IPI_CRC_VAL) | Disabled | 0.234375 | 0.09375 | ||
| 9 | Platform Management (ENABLE_PM_VAL) | Enabled | 64.5625 | 65.375 | ||
| 10 | WDT based restart of APU sub-system (ENABLE_RECOVERY_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 0.671875 | 0.65625 | |
| 11 | WDT based restart of system (ENABLE_RECOVERY_RESET_SYSTEM_VAL) | Disabled | Power Management (ENABLE_PM_VAL), ENABLE_RECOVERY | 0 | 0 | |
| 12 | WDT based restart of PS (ENABLE_RECOVERY_RESET_PS_ONLY_VAL) | Disabled | Power Management (ENABLE_PM_VAL), ENABLE_RECOVERY | 0 | 0 | |
| 13 | Escalation of sub-system restart to SRST/PS-only if the first restart attempt fails (ENABLE_ESCALATION_VAL) | Disabled | Power Management (ENABLE_PM_VAL), ENABLE_RECOVERY | 0 | 0 | |
| 14 | Check Healthy boot (CHECK_HEALTHY_BOOT_VAL) | Disabled | Power Management (ENABLE_PM_VAL), ENABLE_RECOVERY | 0.015625 | 0.03125 | |
| 15 | Idling peripherals before PS or System reset (IDLE_PERIPHERALS_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 0.03125 | 0.04688 | |
| 16 | Enables idling and reset of nodes before force power down of subsystem (ENABLE_NODE_IDLING_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 3.765625 | 3.95313 | |
| 17 | Enable Power Off Suspend feature(ENABLE_POS_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 10.8046875 | 10.4063 | |
| 18 | RTC Test (ENABLE_RTC_TEST_VAL) | Disabled | 0.234375 | 0.23438 | ||
| 19 | Enable unused RPU power down feature (ENABLE_UNUSED_RPU_PWR_DWN_VAL) | Enabled | Power Management (ENABLE_PM_VAL) | 0.328125 | 0.29688 | |
| 20 | CONNECT_PMU_GPO_2_VAL | Enabled | Power Management (ENABLE_PM_VAL) | 0.01563 | ||
| 21 | CONNECT_PMU_GPO_3_VAL | Enabled | Power Management (ENABLE_PM_VAL) | 0.046875 | ||
| 22 | CONNECT_PMU_GPO_4_VAL | Enabled | Power Management (ENABLE_PM_VAL) | 0.04688 | ||
| 23 | CONNECT_PMU_GPO_5_VAL | Enabled | Power Management (ENABLE_PM_VAL) | 0.04688 | ||
| 24 | Xilskey (ENABLE_EFUSE_ACCESS) | Disabled | Power Management (ENABLE_PM_VAL) | 10.7734375 | 10.5313 | |
| 25 | Enable DDR self refresh over warm restart feature (ENABLE_DDR_SR_WR_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 0.515625 | 0.5625 | |
| 26 | Disable clock permission checking (DISABLE_CLK_PERMS_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | -0.1875 | -0.1719 | |
| 27 | Enable board shutdown related code for ZCU100 (PMU_MIO_INPUT_PIN_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 0.234375 | 0.20313 | |
| 28 | Tell Board shutdown pin and state (BOARD_SHUTDOWN_PIN_VAL),(BOARD_SHUTDOWN_PIN_STATE_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 0.046875 | 0.0625 | |
| 29 | Secure Access to PMU Global registers (SECURE_ACCESS_VAL) | Disabled | Power Management (ENABLE_PM_VAL) | 0.601563 | 0.60156 | |
| Total PMU Firmware Size with all default features | 112.3046875 | 115.6719 | ||||
Safety Application:
Features highlighted in light green are required for STL execution in safety applications.
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