Zynq UltraScale＋ MPSoC VCU TRD 2019.1 - 10G HDMI Video Capture and HDMI Display
- Saket Kumar Bafna (Unlicensed)
- Maulik K Patel (Unlicensed)
Zynq UltraScale＋ MPSoC VCU TRD 2019.1 - 10G HDMI Video Capture and HDMI Display
Table of Contents
1 Overview
The primary goal of this Design is to demonstrate the capabilities of VCU hard block present in Zynq UltraScale+ EV devices. The TRD will serve as a platform to tune the performance parameters of VCU and arrive at optimal configurations for encoder and decoder blocks with the streaming use case where bandwidth plays a vital role. 10G will give sufficient bandwidth for the streaming protocol to play video pipeline smoothly.
This design supports the following video interfaces:
Sources:
- HDMI-Rx capture pipeline implemented in the PL.
- File source (SD card, USB storage, SATA hard disk).
- Stream-In from network or internet.
Sinks:
- HDMI-Tx display pipeline implemented in the PL.
VCU Codec:
- Video Encode/Decode capability using VCU hard block in PL
- AVC/HEVC encoding.
- Encoder/decoder parameter configuration.
Streaming Interfaces:
- 10G Ethernet on PL
- 1G Ethernet on PS
Video format:
- NV12
10G Deliverables:
| Pipeline | Input source | Output Type | Resolution | Video encode/Decoder type | Deliverables |
Record/Stream-Out pipeline | HDMI-Rx | File Sink/ Stream-Out | 4K/1080p | HEVC/AVC | HDMI Rx Video encodes with VCU and stores it in a container format. |
Playback pipeline | File Source/ Stream-In | HDMI –Tx | 4K/1080p | HEVC/AVC | Playback of the local- |