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Differences Between Zynq UltraScale+ MPSoC and Versal

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Adaptive SoC

The examples on this page are done on the Zynq UltraScale+ MPSoC platform.

On Versal ACAPAdaptive SoC, the differences are:

  • 2 ARM-A CPUs instead of 4

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Code Block
languagecpp
themeMidnight
linenumberstrue
Reading symbols from test.elf...done.
(gdb) b foo
Breakpoint 1 at 0x400620: file test.c, line 32.
(gdb) r
Starting program: /scratch/gdb-test/test.elf 

Breakpoint 1, foo (s=0x7fffffffe1c0) at test.c:32
32	    s->str = "This is a string";
(gdb) n
33	    memset(s->arr, 0xAA, sizeof(s->arr));
(gdb) n
34	    s->var = 1234;
(gdb) n
36	    global_var = 0xCC33CC33;
(gdb) n
38	    if (s->str == NULL) {
(gdb) x/x &global_var
0x601054 <global_var>:	0xcc33cc33
(gdb) x/4x &global_var
0x601054 <global_var>:	0xcc33cc33	0x00000000	0x00000000	0x00000000
(gdb) x/s s->str
0x400724:	"This is a string"
(gdb) info registers
rax            0x7fffffffe1c0	140737488347584
rbx            0x0	0
rcx            0x0	0
rdx            0x8	8
rsi            0x7fffffffe1cc	140737488347596
rdi            0x7fffffffe1c4	140737488347588
rbp            0x7fffffffe1b0	0x7fffffffe1b0
rsp            0x7fffffffe1a0	0x7fffffffe1a0
r8             0x400710	4196112
r9             0x7ffff7de7ab0	140737351940784
r10            0x34e	846
r11            0x7ffff7b7f970	140737349417328
r12            0x4004e0	4195552
r13            0x7fffffffe2d0	140737488347856
r14            0x0	0
r15            0x0	0
rip            0x40065a	0x40065a <foo+70>
eflags         0x246	[ PF ZF IF ]
cs             0x33	51
ss             0x2b	43
ds             0x0	0
es             0x0	0
fs             0x0	0
gs             0x0	0
k0             0x0	0
k1             0x0	0
k2             0x0	0
k3             0x0	0
k4             0x0	0
k5             0x0	0
k6             0x0	0
k7             0x0	0
(gdb) n
42	    disassemble_me();
(gdb) disassemble disassemble_me
Dump of assembler code for function disassemble_me:
   0x0000000000400679 <+0>:	push   %rbp
   0x000000000040067a <+1>:	mov    %rsp,%rbp
   0x000000000040067d <+4>:	movq   $0x0,-0x8(%rbp)
   0x0000000000400685 <+12>:	mov    -0x8(%rbp),%rax
   0x0000000000400689 <+16>:	movzbl (%rax),%eax
   0x000000000040068c <+19>:	mov    %al,-0x9(%rbp)
   0x000000000040068f <+22>:	nop
   0x0000000000400690 <+23>:	pop    %rbp
   0x0000000000400691 <+24>:	retq   
End of assembler dump.

Debugging Examples

Zynq UltraScale+ MPSoC and

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Versal Adaptive SoC PS + PMU simultaneous debugging

To debug The PS and PMU simultaneously you need to boot up the Microblaze and ARM64 QEMU instances with the -gdb flag.
Once the virtual machines are started, you can remotely target them with two separate instances of GDB.

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Info

Most QEMU arguments are omitted for brevity.  A list of example arguments used when booting a Zynq UltraScale+ MPSoC or Versal ACAP Versal Adaptive SoC machine can be found here.

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