These Drivers are This page is deprecated and no more supported.
This Design enable Xilinx VPSS-CSC (Colour Space Conversion) to work as Mem 2 Mem Device. Xilinx Frame buffer Read → Xilinx VPSS-CSC → Xilinx Frame buffer write act as composite device
...
This reference design is with ZCU102
Device tree binding
The dts node should be defined with correct configuration. The common dts properties are described in video.txt
Code Block | ||
---|---|---|
| ||
v_frmbuf_rd_0: v_frmbuf_rd@a0010000 { compatible = "xlnx,axi-frmbuf-rd-v2"; #dma-cells = <1>; interrupt-parent = <&gic>; interrupts = <0 90 4>; reg = <0x0 0xa0010000 0x0 0x10000>; reset-gpios = <&gpio 78 1>; xlnx,dma-addr-width = <32>; xlnx,vid-formats = "rgb888", "bgr888", "nv16", "yuyv"; }; csc_1:csc@a0100000 { compatible = "xlnx,v-vpss-csc"; reg = <0x0 0xa0100000 0x0 0x10000>; clocks = <&vid_stream_clk>; reset-gpios = <&gpio 80 1>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; xlnx,video-format = <2>; xlnx,video-width = <8>; csc_in: endpoint { remote-endpoint = <&rb_out>; }; }; port@1 { reg = <1>; xlnx,video-format = <2>; xlnx,video-width = <8>; csc_out: endpoint { remote-endpoint = <&wb_in>; }; }; }; }; v_frmbuf_wr_0: v_frmbuf_wr@a0000000 { compatible = "xlnx,axi-frmbuf-wr-v2"; #dma-cells = <1>; interrupt-parent = <&gic>; interrupts = <0 89 4>; reg = <0x0 0xa0000000 0x0 0x10000>; reset-gpios = <&gpio 79 1>; xlnx,dma-addr-width = <32>; xlnx,vid-formats = "rgb888", "bgr888", "nv16", "yuyv"; }; video_m2m { compatible = "xlnx,mem2mem"; dmas = <&v_frmbuf_rd_0 0>, <&v_frmbuf_wr_0 0>; dma-names = "tx", "rx"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; direction = "input"; wb_in: endpoint { remote-endpoint = <&csc_out>; }; }; port@1 { reg = <1>; direction = "output"; rb_out: endpoint { remote-endpoint = <&csc_in>; }; }; }; }; |
...