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HW IP Features
Versal
- The two GPIO controllers have the same functionality. There are a total of 174 channels in two
controllers:
PMC GPIO controller:- Two banks (26 channels each) to PMC MIO
- Two banks (32 channels each) to PL EMIO
- One bank (26 channels) to LPD MIO
- One bank (32 channels) to PL EMIO
- The function of each GPIO can be dynamically programmed on an individual or group basis.
- Enable, bit or bank data write, output enable and direction controls.
- Programmable interrupts on individual GPIO basis
- Status read of raw and masked interrupt.
- Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
ZynqMP
- 78 GPIO signals for device pins
- Routed through the MIO multiplexer.
- Outputs are 3-state capable.
- 288 GPIO signals between the PS and PL through the EMIO interface
- 96 inputs.
- 192 outputs (96 true outputs and 96 output enables).
- The function of each GPIO can be dynamically programmed on an individual or group basis.
- Enable, bit or bank data write, output enable and direction controls.
- Programmable interrupts on individual GPIO basis
- Status read of raw and masked interrupt.
- Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
Zynq
- 54 GPIO signals for device pins
- Routed through the MIO multiplexer.
- Outputs are 3-state capable.
- 192 GPIO signals between the PS and PL via the EMIO interface
- 64 Inputs
- 128 Outputs(64 true outputs and 64 output enables).
- The function of each GPIO can be dynamically programmed on an individual or group basis.
- Enable, bit or bank data write, output enable and direction controls.
- Programmable interrupts on individual GPIO basis
- Status read of raw and masked interrupt.
- Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
Features supported in driver
Versal
- The two GPIO controllers have the same functionality. There are a total of 174 channels in two
controllers:
PMC GPIO controller:- Two banks (26 channels each) to PMC MIO
- Two banks (32 channels each) to PL EMIO
LPD GPIO controller:
- One bank (26 channels) to LPD MIO
- One bank (32 channels) to PL EMIO
- The function of each GPIO can be dynamically programmed on an individual or group basis.
- Enable, bit or bank data write, output enable and direction controls.
- Programmable interrupts on individual GPIO basis
- Status read of raw and masked interrupt.
- Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
ZynqMP
- 78 GPIO signals for device pins
- Routed through the MIO multiplexer.
- Outputs are 3-state capable.
- 288 GPIO signals between the PS and PL through the EMIO interface
- 96 inputs.
- 192 outputs (96 true outputs and 96 output enables).
- The function of each GPIO can be dynamically programmed on an individual or group basis.
- Enable, bit or bank data write, output enable and direction controls.
- Programmable interrupts on individual GPIO basis
- Status read of raw and masked interrupt.
- Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
...
This driver is currently in sync with mainline kernel driver.
Change Log
2023.2
summary
- gpio: zynq: fix zynqmp_gpio not
- Fix for zynqmp_gpio not an immutable chip warning gpio: synq: remove
- Remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres
commits
2f674fa - gpio: zynq: fix zynqmp_gpio not an immutable chip warning
f79565a - gpio: synq: remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres
2023.1
- None
2022.2
- None
2022.1
- None
2021.2
- None
2021.1
- None
2020.2
...
- None
2020.1
Summary
- gpio:zynq: Remove error prints in EPROBE_DEFER
- gpio:zynq:use module_platform_driver to simplify the code
commits
...
- Remove error prints in EPROBE_DEFER
...
- use module_platform_driver to simplify the code
2019.2
summary
- gpio: zynq: Add pmc gpio support
commits
...
- Add pmc gpio support
2019.1
summary:
- gpio: zynq: Configured zynq gpio's in boot loader stage.
- gpio: zynq: Added support runtime PM for GPIO
- gpio: zynq: Disable the irq if it is not a wakeup source
commits:
...
- Report gpio direction at boot
...
- properly support runtime PM for GPIO used as interrupts
...
- Disable the irq if it is not a wakeup source
2018.3
- gpio: zynq: Remove call to platform_get_irq
- gpio: zynq: simplifly getting drvdata
- gpio: zynq: Setup chip->base based on alias ID
52b64a2 - gpio: zynq: Remove call to platform_get_irq
eb816d4 - gpio: zynq: simplifly getting drvdata
5dd4162 - gpio: zynq: Setup chip->base based on alias ID
2018.2
Summary:
- gpio: zynq: protect Protect direction in/out with a spinlock
Commits:
355168 - gpio: zynq: protect direction in/out with a spinlock
2018.1
Summary:
- gpio: zynq: Add support for suspend resume
Commits:
e11de4d - gpio: zynq: Add support for suspend resume
2017.4
- None
2017.3
Summary:
- gpio: gpio-zynq.c: Fix kernel doc warnings
- gpio: gpio-zynq: Fix warnings in the driver
- gpio: gpio-zynq: shift Shift zynq_gpio_init() to subsys_initcall level
- gpio: zynq: Clarify quirk and provide helper function
- gpio: zynq: Provided workaround for GPIO
Commits:
9572161 - gpio: gpio-zynq.c: Fix kernel doc warnings
a9e595b - gpio: gpio-zynq: Fix warnings in the driver
554ae6b - gpio: gpio-zynq: shift zynq_gpio_init() to subsys_initcall level
913cf8b - gpio: zynq: Clarify quirk and provide helper function
8bc5037 - gpio: zynq: Provided workaround for GPIO
2017.2
- None
2017.1
Summary:
- gpio: zynq: Add support for suspend resume
- gpio: zynq: Wakeup gpio controller when it is used as IRQ controller
Commits:
764c694 gpio: zynq: Add support for suspend resume
6a8c796 gpio: zynq: Wakeup gpio controller when it is used as IRQ controller
2016.4
- None
2016.3
Summary:
- gpio:Added zynq specific check for special pins on bank zero.
Commits:
- e3296f1 - gpio:Added zynq specific check for special pins on bank zero.
...