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The RPU cluster is capable of accessing to the DDR memory either directly (DDR S0 port) or using the coherent path as any other LPD master. By default the coherency is disabled in the RPU_[X]_CFG register, but transactions can be directed through the CCI-400 engine setting the Coherent bit in the register. The RPU is also configured as secure master by default in the LPD_SLCR_SECURE.slcr_rpu register so there is no need to modify it.
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