Table of Contents |
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Introduction
This page gives an overview of scugic driver which is available as part of the Xilinx Vivado and SDK distribution.Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/scugic
Driver source code is organized into different folders. Below diagram shows the scugic driver source organization
scugic
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-- Doc - Provides the API and data structure details
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- Examples - Reference application to show how to use the driver APIs and calling sequence
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- Source - Driver source files
Features Supported
Controller/Driver features supported
- Support for following type of interrupts,
- Software generated interrupts (SGIs)
- Shared-peripheral interrupts (SPIs) from PS and PL
- Private-peripheral interrupts (PPIs)
- Interrupt prioritization and handling
- Programming of interrupt routing to one or more processors
- Enabling and disabling of interrupts.
- Programming interrupt sensitivity
- Uni-processor and multiprocessor environments
Known issues and Limitations
Test cases
Scugic example
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scugic/examples/xscugic_example.cThis example evaluates triggering of interrupts by simulating software generated interrupt.
Output
Code Block | ||
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GIC Example Test Successfully ran GIC example Test |
Scugic low level example
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scugic/examples/xscugic_low_level_example.cThis is an interrupt example which utilizes low level APIs to configure the interrupt
Output
Code Block | ||
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Low Level GIC Example Test Successfully ran Low Level GIC example Test |
Changelog
2020.2
- Updated tcl to support interrupt ID generation for broader range of HW designs
having slice/conactconcat/OR gate combinations - Updated Makefile for parallel make execution and incremental build support.
2020.1
- None
2019.2
- Fixed issues in interrupt mapping/un-mapping for AMP use case. Default mapping
of all interrupts to relevant CPU during initialization has been removed. Now,
interrupt would be mapped to the CPU, only if request is made to enable that specific
interrupt ID.
2017.4
- No Changes
2017.3
- Updated scugic.tcl to add support for util_reduced_vector IP(OR gate) in the interrupt context
- Fix compilation warning in xscugic_g.c
- Updated get_psu_interrupt_id proc in scugic.tcl to check if sink pin is connected to any peripheral, to avoid the BSP failure if interrupt pin is connected externally.
2017.2
- Updated scugic.tcl to add U suffix for all the macros
2017.1
- Added new API XScuGic_Stop to Disable distributor and interrupts in case they are being used only by current CPU. It also removes current CPU from interrupt target registers for all interrupts.
- Add support for changing GIC CPU master at run time, new API XScugiC_GetCpuId is added to access CpuId
- Modified the scugic.tcl script to have array size in config table
2016.4
- Fixed incorrect modification of interrupt target processor register in XScuGic_InterruptMaptoCpu
2016.3
- The Scugic driver tcl is updated to return correct PL ips' interrupt IDs when no interrupt is connected to pl_ps_irq0.
- Created a new static function DoDistributorInit to simplify the flow and avoid code duplication in xscugic.c. Changes are made for USE_AMP use case for R5. In a scenario (in R5 split mode) when one R5 is operating with A53 in open amp config and other R5 is running baremetal application, the existing code had the potential to stop AMP to work (if for some reason the R5 running the baremetal app tasked to initialize the Distributor hangs or crashes before initializing the Distributor). Changes are made so that the R5 under AMP first checks if the distributor is enabled or not and if not, it does the standard Distributor initialization.