This page gives an overview of the bare-metal driver support for AXI Watchdog Timer.
Table of Contents
Table of Contents exclude Table of Contents
Introduction
This page gives an overview of Axi Watchdog timer driver /Window watchdog timer which is available as part of the Xilinx Vivado and SDK distribution.
The Xilinx® LogiCORE? IP AXI4-Lite Timebase Watchdog Timer (WDT) is a 32-bit peripheral that provides a 32-bit free-running
timebase and watchdog timer.
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| Directory | Description |
|---|---|
| src | Driver source files, make and cmakelists file |
| examples | Example applications that show how to use the driver features |
| doc | Provides the API and data structure details |
| data | Driver .tcl , .mdd and .yaml files |
Note: AMD Xilinx embeddedsw build flow is changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki page Porting embeddedsw components to system device tree (SDT) based flow - Xilinx Wiki - Confluence (atlassian.net).
The .yaml(in data folder)
and CMakeListsand CMakeLists.txt(in src folder) files
would be used inare needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.
Driver Implementation
For a full list of features supported by this IP, please refer AXI_Timebase_Wdt_Doc
For a full list of features supported by this IP, please refer 59: System Watchdog Timer Versal Trm
Features
Controller Features supported
• Connects as a 32-bit slave on a AXI4-Lite interface• Watchdog timer with selectable timeout period and interrupt
• Configurable WDT enable: enable-once or enable-repeatedly
• One 32-bit free-running timebase counter with rollover interrupt-dual control register
Driver Supported Features
All Controller Features supported.
- Supports Generic Watch dog timer and polled and interrupt mode window watch dog feature.
- Q&A mode not implemented.
Known Issues and Limitataions
- None
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