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Configuring the Zynq UltraScale PS/PL interfaces:

Here, I have enabled the Slave port to allow access to the OCM/DDR (HP), and the PS UART (LPD):


Also, enable the fragmentation so we can use the PS_UART:

In this demo, we shall be using no LMB/AXI BRAM for the Microblaze. So, we will need to hold the Microblaze in reset, while the PSU
is configured. We can then wakeup by toggling a GPIO pin. I also enabled the GPIO via the EMIO here to do this:

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