...
In case some other system component, like VCU, mandates the buffer should be aligned to higher value, e.g. 32 byte aligned, the user is expected to set this manually in the device tree using xlnx,dma-align dt property.
Refer to the device tree bindings doc for details.
- Note: normally, registers programmed while the IP is running will not take effect until the next frame. The very first frame, however, is an exception: the IP is not yet running and, as such, the values take effect immediately. Nevertheless, there is no additional special treatment given the first frame buffer. As such, it will be written to, in effect, twice.
...
2020.1
- Summary
- Add support 8 ppc
- Commits
- bb91ad8 dmaengine: xilinx: frmbuf: Add support for 8 ppc
2019.2
- Summary
- Add support for low latency capture
- Commits
...