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A default bitstream is loaded after boot as part of the dfx-mgr startup, which bitstream is loaded is determined by the dfx-mgr daemon configuration file located in “/etc/dfx-mgrd/daemon.conf”. Starting with 2022.1 Kria Linux images the default bitstream loaded is called “k26-starter-kits” has no functional PL logic but provides an EMIO mapping to the carrier card fan control pin via an EMIO. Thus removing Removing this bitstream will effectively disable active fan control as the physical pin is no longer accessible to Linux. This bitstream is common to all K26 based starter kits (KV260 and KR260).

Fan Control

Starting with the 2022.1 images Kria Starter Kit pre-built software includes active fan control using the Linux fancontrol library and the which uses ZU+ PS TTC0 subsystem. The K26 Starter Kit fan pin is connected to PL pin HDA20 (physical pin A12) and thus in order to access it users need to ensure to provide an EMIO pin mapping between TTC0-Clk2 and HDA20. This is accounted for in the Xilinx generated platforms and reference bitstreams. If user wants to use the same fan control mechanism then they need to account for this same EMIO mapping when generating their custom bitstream designs.

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Custom & Production SOM FW/SW Design Guidance

SOM Firmware

This section captures guidance on FW configurations that a Kria SOM should be aware of when creating custom firmware and carrier card designs.

MPSoC PMU FW

The MPSoC PMU is used to implement the platform interactions with the SOM power management ICs. Given this coupling between the SOM HW design and PMU FW there are a few PMU controlled MIO signals that require special handling or design considerations. For details on MPSoC FW implementation see the PMU Firmware Wiki.

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MIO31 - SHUTDOWN: The PMU has an optional input pin for an external platform shutdown request (e.g. carrier card push-button). The default mapping for this functionality in PMU FW is to PMU GPI pin MIO31.

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MIO34 - PS_PWR_EN: The PMU controls the PS_PWR_EN signal, which is used during shutdown of the platform to disable the power supplies. The PMU GPO2 signal is used to control to physical pin MIO34, which is connected to the SOM PS_PWR_EN signal. The SOM design has a 10kohm pull-up resistor on the signal, but as part of the boot process and the MPSoC dynamic MIO pin selection a developer needs to ensure that they set PMU build time configuration CONNECT_PMU_GPO_2_VAL= 0 . Without this setting there is potential of a glitch on the PS_PWR_EN signal. Details are captured at this Xilinx AR-71952.

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PL & HW Repositories

Custom & Production SOM FW/SW Design Guidance

SOM Firmware

This section captures guidance on FW configurations that a Kria SOM developer should be aware of when creating custom firmware and carrier card designs.

MPSoC PMU FW

The MPSoC PMU is used to implement the platform interactions with the SOM power management ICs. Given this coupling between the SOM HW design and PMU FW there are a few PMU controlled MIO signals that require special handling or design considerations. For details on MPSoC FW implementation see the PMU Firmware Wiki.

  • MIO31 - SHUTDOWN: The PMU has an optional input pin for an external platform shutdown request (e.g. carrier card push-button). The default mapping for this functionality in PMU FW is to PMU GPO GPI pin MIO35. This is implemented using the PMU FW build-time flag ENABLE_RUNTIME_EXTWDT.

  • Runtime Temperature OT: The PMU has an optional feature of implementing an over-temperature monitoring, using the MPSoC SysMon as the temperature feedback. This is implemented using the PMU FW build-time flag ENABLE_RUNTIME_OVERTEMP.

Known Issues

  • Linux hang while installing watchdog packages using dnf

  • Xmutil load/unload app can stop working if Jupyter notebook left in running stateMIO31.

  • MIO34 - PS_PWR_EN: The PMU controls the PS_PWR_EN signal, which is used during shutdown of the platform to disable the power supplies. The PMU GPO2 signal is used to control to physical pin MIO34, which is connected to the SOM PS_PWR_EN signal. The SOM design has a 10kohm pull-up resistor on the signal, but as part of the boot process and the MPSoC dynamic MIO pin selection a developer needs to ensure that they set PMU build time configuration CONNECT_PMU_GPO_2_VAL= 0 . Without this setting there is potential of a glitch on the PS_PWR_EN signal. Details are captured at this Xilinx AR-71952.

  • MIO35 - External WD: The PMU has an optional feature for having PMU interact with an external watch-dog (WD). The default mapping for this functionality in PMU FW is to PMU GPO pin MIO35. This is implemented using the PMU FW build-time flag ENABLE_RUNTIME_EXTWDT.

  • Runtime Temperature OT: The PMU has an optional feature of implementing an over-temperature monitoring, using the MPSoC SysMon as the temperature feedback. This is implemented using the PMU FW build-time flag ENABLE_RUNTIME_OVERTEMP.

Linux

This section captures guidance on Linux SW configurations that a Kria SOM developer should be aware of when creating their production Linux images.

Fan Control

Linux fan control library and its use in the ZU+ target requires the following Linux kernel configurations to be enabled:

  • CONFIG_SENSORS_PWM_FAN=y

  • CONFIG_PWM=y

  • CONFIG_PWM_CADENCE=y

The PS subsystem device tree must include the desired TTC node and that node must include the "pwm-cells" property.

Related Links