Introduction
This page gives an overview of CSUDMA driver which is available as part of the Xilinx Vivado and
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Vitis distribution.
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CSUDMA
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provides an efficient data transfer
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mechanism between the PSS's Memory and the CSU Stream Peripherals.
On ZynqMP, the CSU_DMA is present inside CSU (Configuration Security Unit) module which is located within the Low-Power Subsystem (LPS) internal to the PS.
On Versal it is known as PMCDMA and present in PMC (used for Platform Management). CSUDMA is used interchangeably for PMCDMA in this documentation and driver unless specified.
CSU_DMA allows the CSU to move data efficiently between the memory (32 bit AXI interface) and the CSU stream peripherals (SHA, AES and PCAP) via Secure
Stream Switch (SSS). The CSU_DMA is a 2 channel simple DMA, allowing separate control of the SRC (read) channel and DST (write) channel. The DMA is effectively able to transfer data:
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From PS-side to the SSS-side (SRC DMA only)
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From SSS-side to the PS-side (DST DMA only)
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Simultaneous PS-side to SSS_side and SSS-side to the PS-side
How to enable
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For more information, please refer to CSUDMA chapter in ZynqMP TRM (UG1085) or PMCDMA chapter in Versal TRM (AM011).
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
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emapcs | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/csudma | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/csudma |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/ |
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The driver source code is organized into different folders.
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The table below shows the csudma driver source organization.
Directory |
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Description |
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doc |
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Provides the API and data structure details |
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data | Driver .tcl and .mdd file |
examples | Example applications that show how to use the driver |
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features | |
src | Driver source files |
Driver Implementation
For a full list of features supported by this IP, please refer to CSUDMA chapter in ZynqMP TRM (UG1085) or PMCDMA chapter in Versal TRM (AM011) for respective devices.
Features
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Controller
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/Driver features supported
Simple DMA, no scatter-gather
Separate read channel (SRC) and write channel(DST) DMA
Read channel fetches data from the PS-side(memory) and delivers it to the CSU secure stream switch (SSS) interface
Write channel receives data from the CSU secure stream switch (SSS) interface and delivers it to the PS-side (memory).
32-bit AXI 3.0 interface on the PS-side
Deep 128x32-bit data FIFOs for both the SRC and DST data paths
PS-side AXI Issuing capability up to a maximum of 9 commands per channel, with programmable maximum
Single thread (AXI-ID) operation for both read and write channels
CSU_DMA operates synchronously in the “csu_main_clk” or
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PMC clock domain
Target CSU_DMA frequency of 400MHz max
DST DMA will only issue a write AXI command if the corresponding write data is available in the write data FIFO – Store and Forward.
SRC DMA
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will only issue a read AXI command if there is enough space in the read data FIFO for the entire burst.
DMA start address is 32-bit aligned
DMA transfer length is in units of 4-byte words
DMA can accept only 1 command per channel
Timeout mechanisms for both SRC(read) and DST(write) channels
Automatic hardware management of 4kbyte boundary crossing on the PS-side (AXI )
Dedicated APB interface for CSU_DMA register access
Always generates secure (AxPROT[1]=0) AXI commands
DMA supports INCR and FIXED (keyhole) AXI burst-types
Zero-ization of FIFOs for
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security purposes achieved via RAM MBIST
Byte endianness option available for the SRC DMA
Pseudo-CRC option available for the SRC DMA
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Standalone Driver Supported Features
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- All Controller Features supported.
Test cases
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payload
Known Issues and Limitations
None
Example Applications
CSUDMA driver supports a few basic polled and interrupt examples describing how its different features can be exercised. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/csudma/examples/
Test Name | Example Source | Description |
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CSUDMA Selftest example |
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Basic CSUDMA selftest example to check sanity and use core APIs. | |
CSUDMA Polled example |
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Polled mode example |
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demonstrating CSUDMA transfer via polling of busy state and local loopback. | |
CSUDMA Interrupt example |
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Known issues and Limitations
- None.
Change Log
2020.2
Summary:
- Reorganize cache operations for 32 bit and 64 addressing, corresponding processors and combinations thereof. This change affects the data transfer function prototype.
- Support for parallel makefile execution
- Minor fixes for MisraC
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Interrupt mode example demonstrating CSUDMA transfer via interrupts and local loopback. |
Example Application Usage
CSUDMA Selftest example
Basic CSUDMA selftest example to check sanity and use core APIs.
Expected Output
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CSUDMA Polled example
Polled mode example demonstrating CSUDMA transfer via polling of busy state and local loopback.
Expected Output
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CSUDMA Interrupt example
Interrupt mode example demonstrating CSUDMA transfer via interrupts and local loopback.
Expected Output
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Example Design Architecture
NA
Performance
NA
Change Log
2021.1
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.1/doc/ChangeLog#L420
2020.2
https://github.com/Xilinx/embeddedsw/
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2020.1
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Summary:
Coverity warning fixes and PMC support
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https://github.com/Xilinx/embeddedsw/
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2019.2
Summary:
Minor warning fixes
Commits:
https://github.com/Xilinx/embeddedsw/
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e744693 Csudma: Shifting value too far.
cd642dc Csudma: Value is not of appropriate type.
db78d82 Csudma: Use of mixed mode arithmetic.
8c7905e Csudma: No cast for widening complex int expression (MR).
504492a Csudma: Literal value requires a U suffix.
224dbe2 csudma: Change DstDone variable to use volatile keyword
36819a5 csudma: Fixes coverity warning.
2019.1
Summary:
Minor enhancements and warning fixes
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2019.1
https://github.com/Xilinx/embeddedsw/
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ac01a5a csudma: Adds psu_pmu processor check
a0cb3a8 csudma: Fix driver version number
6d9a22d csudma: Add support for psv_pmcdma IP name
383a650 Csudma: Adds IAR compiler support
352843b csudma: examples: Fix IAR compiler warning for xcsudma_intr_example.
2018.3
Summary:
- Minor enhancements on code quality
- Added DMA timeout
Commits:
2018.3
https://github.com/Xilinx/embeddedsw/
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2018.2
None
2018.1
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- Added Support for peripheral test app support
- Added New API XCsuDma_64BitTransfer() in the driver which is useful
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- None
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- None
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- None
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- None
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- None
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https://github.com/Xilinx/embeddedsw/blob/release-2018.1/doc/ChangeLog#L278
Related Links
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