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Instructions apply to all boards but board layout will vary. Reference callouts when setting up.
PC connectivity is not necessary to run this BIST.
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Verify hardware setup—see “General Board HW Setup/Debug” /wiki/spaces/XWUC/pages/1329201173. Board should be powered off at the start of tutorial.
Set mode switch SW6 to 0010 (QSPI32). See available boot modes below.
Connect to power with provided cables and the board’s 6-pin power supply (J52) and power on board. The kit will include an cable and power adapter for this purpose, as shown in the image below.
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Power Check: The three rows of Power Good LEDs should glow green, indicating a good power system.
Note: Descriptions for each power and status LED are available in each board’s user guide provided at the top of this page. Refer to the table below to find the location of the descriptions for each board.
Board | Table # | Page |
|---|---|---|
ZCU102 | 3-34 | 82 |
ZCU104 | 3-25 | 68 |
ZCU106 | 3-36 | 89 |
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Each test in the BIST corresponds to a PL LED (see callouts) which lights up (green) when the test is passed. The full BIST will pass when all LEDs have lit up green.
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The Clock/Clocking and Memory, BRAM, PL-DDR4, PS-DDR4, Flash, EEPROM, and I2C tests run without user input.
For the DIP switch test (SW13, see callouts), all DIP switches must be turned to the ON position and then back.
For the pushbutton (PB) test, the four directional buttons (N, W, S, and E) can be pressed in any order as long as the center button is pushed last.
If a test is waiting to receive any user input, its corresponding LED will flash on and off slowly. When the device begins to receive input, it will flash quickly until all necessary inputs for that test have been received (e.g., all buttons pressed).
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The following operations can be run from the GPIO Commands tab to verify functionality.
Blink LEDs
Return state of DIP switch
Return PMU state
Return PS GPIO state
Return PL GPIO state
Related Links
General Board HW Setup/Debug/wiki/spaces/XWUC/pages/1329201173
Board Schematics (Links below lead to downloads at the Xilinx website)
Board Product Pages
Zynq Ultrascale+ MPSoC Targeted Reference Designs (TRD) Page
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