QEMU Supported Platforms

This section covers what Xilinx boards and peripherals are implemented in QEMU.



Supported Boards

The following table shows what boards are supported by QEMU, and the names of the BSPs in PetaLinux and Yocto.

PlatformBoard NamePetaLinux-specific Board NameYocto-specific board name
Artix-7 w/ MicroblazeAC701xilinx-ac701
Kintex-7 w/ MicroblazeKC705xilinx-kc705
Kintex-7 w/ Microblaze

KCU105

xilinx-kcu105


Spartan-7 w/ MicroblazeSP701xilinx-sp701
Virtex Ultrascale+ w/ MicroblazeVCU118xilinx-vcu118

Zynq7000 SoC

ZC702xilinx-zc702zc702-zynq7
Zynq7000 SoCZC706xilinx-zc706zc706-zynq7

Zynq Ultrascale+

ZC1751xilinx-zc1751
Zynq Ultrascale+ZCU102xilinx-zcu102zcu102-zynqmp
Zynq Ultrascale+  ZCU104xilinx-zcu104zcu104-zynqmp
Zynq Ultrascale+ZCU111xilinx-zcu111zcu111-zynqmp
Zynq Ultrascale+ZCU1275xilinx-zcu1275zcu1275-zynqmp
Zynq Ultrascale+ZCU1285xilinx-zcu1285zcu1285-zynqmp
Zynq Ultrascale+ZCU208xilinx-zcu208zcu216-zynqmp
Zynq Ultrascale+ZCU216xilinx-zcu216zcu216-zynqmp
Zynq Ultrascale+Ultra96xilinx-ultra96ultra96-zynqmp
VersalVCK190xilinx-vck190vck190-versal
VersalVCK5000xilinx-vck5000
VersalVMK180xilinx-vmk180vmk180-versal

Supported Hardware

This section will cover what hardware and peripherals are supported in QEMU.

The block diagrams provide a broad overview of what is supported in each hardware block in QEMU, while the tables provide more detail on the support scope.

Block Diagrams

Versal

 Versal Block Diagram

ZynqMP

 ZynqMP Block Diagram

Xilinx QEMU Features

 Supported Features Table

Application Processing Units

DescriptionSupport Scope
ARM Interrupt Controller (GICv2)Supported
ARM v8 (A53) Implementation.Little Endian Only
ARM v8 EL0 SupportAArch64 and AArch32
ARM v8 EL1 SupportAArch64 and AArch32
ARM v8 EL2 SupportAArch64
ARM v8 EL3 SupportAArch64
ARM v8 Crypto InstructionSupported
Vector Floating Point (VFP)As maintained by mainline. No formal acceptance criteria to feature
SIMD supportAs maintained by mainline. No formal acceptance criteria to feature.
ARM v7 SupportA9, R5, R4 supported.


Real-Time Processing Units

DescriptionSupport Scope
Dual Core ARM-R5fIncomplete coverage of system register set, little endian only
Dual core R5 CPU run-time configurationStatic dual core, no parallel/lock transitioning
Fault HandlingFaults can be externally injected
Tightly coupled MemoriesOnly globally accessible TCM memory region is accessible.
Flat memory only, no
control register implementation
Interrupt ControllerSupported
SLCRsVery limited functionality. Only dummy registers, except SD is_MMC control.


PMU (ZynqMP and Versal)

DescriptionSupport Scope
IPILimited Connectivity specific to PMU functionality
Global RegistersSupported
PMU MicroBlazeSupported
PMU Interrupt ControllerSupported


I/O Peripherals and Devices

DescriptionSupport Scope
I/O PeripheralsNot all peripherals are implemented.
Some standa
rd peripherals are slight variations on the actual cores configuration-wise.
Cadence Gigabit Ethernet Controller1588 not supported.
SD Host Controller Interface (v3.0)Supported
SD Card modelNo SDXC
QSPI controller (excludes Linear and Generic)Supported
QSPI linear regionNo XIP.  Slow emulation performance.
QSPI NOR flash devicesIncomplete but reasonable selection of parts including many modern QSPI capable devices.
OSPISupported
UART ControllerSupported
SPI controllerMaster mode only.
I2C controllerMaster mode only.
DDRSimple flat RAM model, no ECC.
CANSupported
CAN-FDSupported
XADCNot supported
GPIOLimited functionality, connects to remote port.
MDIO and Ethernet PHYDummy models, show link up on requested PHY using MDIO
USBSupported - Host mode only.
SATASupported
PCISupported


DisplayPort

DescriptionSupport Scope
DP ModelAUX Communication.
DPCP: DisplayPort Configuration Information.
EDID.
DPDMASupported
2 LayersSupported
Alpha BlendingSupported
AudioWith some unexpected behavior
Dynamic resolution changesSupported
Multiple pixel formatsNot all
Mali GPUNot supported


AMBA AXI Bus

DescriptionSupport Scope
AMBA/AXI bus interconnect systemSimple bus model, no AXI/AMBA-specific features (such as MIDs).
Master IDs and Trustzone (secure versus non-secure) transactions supported.
Bus quality of service monitoring and control
N/A
On Chip MemorySupported
AXI Performance Monitor (APM)
AXI Trace Monitor (ATM)
N/A


Additional ZynqMP and Versal Capabilities

DescriptionSupport Scope
XMPUDoes not return Slave error; CPU does not recognize asynchronous aborts on failed accesses.
XPPUDoes not return Slave error; CPU does not recognize asynchronous aborts on failed accesses.
SMMUOnly supports 64-bit page tables.
Clock/reset controllers for low-power and high power domainsLimited feature set specific to CPU functionality.
Interprocessor Interrupt controllerSupported
PL-based AMS blockN/A


Miscellaneous QEMU Non-IP Related Feature

DescriptionSupport Scope
Ability to boot multiple software in different CPUs.Supported
Create QEMU Machine models from Linux device tree binaries (DTB)s.Limited to QEMU maintained DTBs only. IPI/HSI generated DTBs unsupported.
FPDDMANo FCI and no rate-control.
LPDDMANo FCI and no rate-control.
MTTCGSupported


Timers and Clock Generators

DescriptionSupport Scope
Triple Timer Counter (TTC)Supported
SWDT, WDTNot Supported
Si570/71I2C device.  Dummy emulation of clock generator.
RTCSupported

Cryptographic modules

DescriptionSupport Scope
AES-GCMSupported; all key sources
SHA3-384Supported
PMC DMAsSupported
RSASupported
ECDSASupported
eFUSESupported; all documented fields
BBRAMSupported
PUF

Supported. Limited to XilPuf API (Versal) and XilSkey API (ZynqMP).

Helper-data usable across all QEMU sessions, all user credentials, and all hosts.

TRNGSupported. Caveat, TRNG generation is statistically unsecured.


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