Timesys provides security solutions and design services for Xilinx SoCs, including complete end-to-end device security solution that enables developers to implement security early in the design process, maintain strong security and meet regulatory compliance requirements throughout product lifecycles with Vigiles, an on-demand vulnerability monitoring and management service, and continuously keep devices up-to-date on security patches and fixes.
VigiShield Secure by Design
VigiShield Secure by Design is an easy-to-understand, maintainable security layer that can be configured to meet your current customer and regulatory (e.g. NISTIR 8259A and ETSI EN 303) requirements.
Timesys helps Xilinx customers build more secure products with VigiShield by providing expert guidance for applying secure design principles to the development of Xilinx SoCs early in the design process, which is vital to maintaining strong product security throughout the product lifecycle. With VigiShield, Timesys additionally helps ensure products meet industry cybersecurity standards and compliance regulations recommended by regulatory and industry-specific bodies (FDA, IEC, etc).
Some of the VigiShield Secure by Design services Timesys has helped Xilinx customers with include:
Building and using Xen on Ultrascale+ platform.
Implementing domain isolation on Ultrascale+ platform, helping design runtime security strategies using hypervisors.
Implementing secure boot, chain of trust, encrypted storage and secure application development on TEE (Trusted Execution Environment).
Vigiles is Timesys’ Software Bill of Materials (SBOM) management, vulnerability monitoring and remediation, and Software Composition Analysis (SCA) tool specifically optimized for embedded systems that provides build-time Yocto CVE analysis of target images. It does this by collecting metadata about packages to be installed and uploading it to be compared against the Timesys CVE database that pulls data from multiple feeds for 40% more accurate information compared to the National Vulnerability Database (NVD). A high-level overview of the detected vulnerabilities is returned and a full detailed analysis can be viewed online.
Vigiles supports all major Linux build system integrations including Yocto, Buildroot, PetaLinux, Wind River Linux, PTXdist, OpenWrt, Timesys Factory, containers, RTOSes, and other operating systems and ecosystems such as Python for more accurate SBOM generation and CVE analysis.
Timesys offers a managed 10-year BSP Lifecycle Maintenance Service of your products based on PetaLinux or Xilinx Yocto BSP to help ensure your products maintain the needed security posture to protect mission critical applications long after deployment and are compliant with government regulations such as the FDA Cybersecurity Guidelines, EO 14028, and EU Cyber Resilience Act. The Timesys Security Team has the expertise to maintain the embedded Linux OS security for Xilinx Zynq-7000 and UltraScale+ based products, allowing your development teams to focus on new features improvements and next gen products.
TimeStorm is Timesys’ graphical Integrated Development Environment (IDE) designed and optimized for embedded Linux and application and system-level development and debugging. Xilinx Yocto SDKs are autorecognized in TimeStorm, making it easy to develop software with Xilinx provided Yocto/PetaLinux. With TimeStorm, application developers can quickly and easily create more complex applications and streamline, simplify, and accelerate embedded Linux software development.
Timesys Software Engineering Services for Xilinx Zynq-7000 and UltraScale+ SoCs range from consulting to designing, architecting, developing, and securing the platform/application software.
Timesys’ Yocto Platform Design and Development Expertise
As a founding member of Yocto Project and with 20+ years experience in open source software development, Timesys can help you customize your reference Xilinx Yocto BSP to meet your unique product requirements.
Some of the Yocto Engineering Services Timesys has helped Xilinx customers with include:
Building customer-specific meta layers for Zynq UltraScale+ MPSoC Cortex-A53, and updating ZyncMP (ZCU102) and MPSoC to use the common layers
Integrating OpenAMP and customizing & testing rpmsg demos per customer requirements.
Integrating Mali 400MP GPU and test using the OpenGL ES backend
Testing the Linux-FreeRTOS AMP system on Zynq UltraScale+ MPSoC.