AMD Versal™ AI Edge Series Gen 2 - MMI Display Drivers

The AMD Versal AI Edge Series Gen 2 device contains a Display Controller (DC) which lies between the PL fabric and Display Port 1.4 TX Controller (DP TX).

Fig - MMI Top Level Block Diagram

The Display Controller is capable of operating on live video planes from the PL, non live video planes from the memory and in mixed mode where one main plane is from live video source in PL and another plane is non-live from memory.

The DC can fetch non live video frames, audio, cursor plane and secondary data packets from memory using the Display Controller DMA (DCDMA) having 8 channels using descriptor mechanism.

The output of the DC is connected to the DP TX. DP TX is used to encapsulate the video, audio and meta data and use DisplayPort v1.4 protocol to transmit video to DP monitors. The DP TX supports up to 8.1 Gbps per lane and 4 lanes maximum. There also a HDCP controller which supports HDCP 2.3.

The DP TX and HDCP are part of the UDH (USB + DP TX + HDCP) subsystem. The max resolution supported by DP TX is 4kp60 with max raw bandwidth of 32.4 Gbps and effective bandwidth of 25.92 Gbps.

Fig - USB/DP/HDCP Subsystem Block Diagram

The DC can also be completely bypassed and video sent directly to the DP TX.

For details refer to Display Controller and UDH Subsystem

Below are links to the descriptions of the respective drivers: