Zynq UltraScale+ MPSoC VCU TRD 2022.1 - YUV444 Video Capture and Display
This page provides all the information related to Design Module 14 - VCU TRD YUV444 Video Capture and Display design.
Table of Contents
1 Overview
This module enables the capture of YUV444 8-bit and 10-bit video from HDMI-RX. The video can be displayed on HDMI-TX or DisplayPort and recorded on SD cards or USB/SATA drives. The module can stream-in or stream-out encoded data through an Ethernet interface. This module supports up to single-stream 4kp30 YU24 and X403 format.
Xilinx Zynq UltraScale+ VCU HW does not support YUV444 encode/decode processing. Only YUV 4:0:0, 4:2:0 and 4:2:2 sub-sampling modes are supported. This feature enables encoding yuv444p (single planar) video frames using VCU, reading them as YUV4:0:0 of Width x 3*Height buffer. Similarly at the decoder side, VCU Decoder output Width x 3*Height YUV4:0:0 raw video frame but display will treat that buffers YUV444 planar buffer. This feature also includes enhancing FB_RD, FB_WR IP/Drivers and V4l2 and DRM frameworks to support YUV444 planar buffer format.
This design supports the following video interfaces:
Sources:
HDMI-RX capture pipeline implemented in the PL.
File source (SD card, USB storage, SATA hard disk).
Stream-In from network or internet.
Sinks:
HDMI-TX display pipeline implemented in the PL.
DisplayPort-Tx display pipeline implemented in the PS.
Stream-out to network or internet
VCU Codec:
Video Encode/Decode capability using VCU hard block in the PL
AVC/HEVC encoding
Encoder/decoder parameter configuration.
Video format:
YU24 (YUV444 8-bit planar format)
X403 (YUV444 10-bit planar format)
NOTE: 8-bit or 10-bit in above video formats represents color depth.
Supported Resolutions:
The table below provides the supported resolutions from the command line app only in this design.
Resolution | Command Line | |
---|---|---|
Single Stream | Multi-stream | |
4kp60 | x | x |
4kp30 | √ | x |
1080p60 | √ | x |
√ - Supported
x – Not supported
The below table gives information about the features supported in this design.
Pipeline | Input source | Format | Output Type | Resolution | VCU codec |
---|---|---|---|---|---|
Pass-through/RAW Pipeline | HDMI-Rx | YU24/X403 | HDMI-Tx/DP-Tx | 4kp30/1080p60 | N.A. |
Record | HDMI-Rx | YU24/X403 | File Sink/ Stream-Out | 4kp30/1080p60 | HEVC/AVC |
Playback | File Source/ Stream-In | YU24/X403 | HDMI-Tx/DP-Tx | 4kp30/1080p60 | HEVC/AVC |
YUV444 8-bit/10-bit is not supported with serial (capture -> Encode -> Decode -> Display)
pipeline.
The below figure shows the ZCU106 YUV444 design hardware block diagram.
The below figures shows the YUV444 enablement in the frame buffer read and frame buffer write IPs.
The below figure shows the ZCU106 YUV444 design software block diagram.
1.1 Board Setup
Refer to the below link for Board Setup
1.2 Run Flow
The TRD package is released with the source code, Vivado project, PetaLinux BSP, and SD card image that enables the user to run the demonstration.
It also includes the binaries necessary to configure and boot the ZCU106 board. Prior to running the steps outlined in this wiki page, download the TRD package and extract its contents to a directory referred to as TRD_HOME
which is the home directory.
Refer below link to download all TRD contents.
Refer Section 4.1 : Download the TRD of
Zynq UltraScale+ MPSoC VCU TRD 2022.1
wiki page to download all TRD contents.
TRD package contents are placed in the following directory structure. The user needs to copy all of the files from the $TRD_HOME/images/vcu_yuv444
/ to the FAT32 formatted SD card directory.
rdf0428-zcu106-vcu-trd-2022-1/
├── apu
│ └── vcu_petalinux_bsp
├── images
│ ├── vcu_audio
│ ├── vcu_llp2_hdmi_nv12
│ ├── vcu_llp2_hlg_sdi
│ ├── vcu_llp2_plddr_hdmi
│ ├── vcu_multistream_nv12
│ ├── vcu_plddrv1_hdr10_hdmi
│ ├── vcu_plddrv2_hdr10_hdmi
│ └── vcu_yuv444
├── pl
│ ├── constrs
│ ├── designs
│ ├── prebuild
│ ├── README.md
│ └── srcs
├── README.txt
└── zcu106_vcu_trd_sources_and_licenses.tar.gz
16 directories, 3 files
TRD package content specific to the YUV444 design is placed in the following directory structure.
rdf0428-zcu106-vcu-trd-2022-1
├── apu
│ └── vcu_petalinux_bsp
│ └── xilinx-vcu-zcu106-v2022.1-final.bsp
├── images
│ └── vcu_yuv444
│ ├── autostart.sh
│ ├── BOOT.BIN
│ ├── bootfiles/
│ ├── boot.scr
│ ├── config/
│ ├── Image
│ ├── rootfs.cpio.gz.u-boot
│ ├── system.dtb
│ └── vcu/
├── pl
│ ├── constrs/
│ ├── designs
│ │ ├── zcu106_HDMI_YUV444/
│ ├── prebuild
│ │ ├── zcu106_HDMI_YUV444/
│ ├── README.md
│ └── srcs
├── README.txt
└── zcu106_vcu_trd_sources_and_licenses.tar.gz
Scripts to run yuv444 use-cases for various resolutions are placed in the following directory structure:
config
├── 1080p60
│ ├── Display
│ ├── Playback
│ ├── Record
│ ├── Stream-in
│ └── Stream-out
└── 4kp30
├── Display
├── Playback
├── Record
├── Stream-in
└── Stream-out
1.2.1 GStreamer Application (vcu_gst_app)
The vcu_gst_app
is a command-line multi-threaded Linux application. The command-line application requires an input configuration file (input.cfg)
to be provided in the plain text.
Execution of the application is shown below:
Make sure that the HDMI-Rx is configured to 4kp30 mode to run the below pipelines.
Make sure the scalar is set with respective YUV444 format (8-bit or 10-bit) to run the below pipelines. (check Appendix-B for media-ctl and modetest commands)
Run the below pipelines for the YUV444 10-bit display over HDMI-Tx.
4kp30 X403 YUV444 10-bit Display HDMI Pass-through pipeline execution
4kp30 X403 HEVC YUV444 10-bit record pipeline execution
4kp30 X403 HEVC YUV444 10-bit HDMI playback pipeline execution
4kp30 X403 HEVC YUV444 10-bit stream-out pipeline execution
4kp30 X403 HEVC YUV444 10-bit stream-in HDMI pipeline execution
To display the output stream over Display Port, change the
output
to DP in config fileTo run a yuv444 8-bit pipeline, change the
format
to YU24 in config file
Refer to the below link for detailed run flow steps:
1.3 Build Flow
Refer to the below link for detailed build flow steps:
2 Other Information
2.1 Known Issues
For PetaLinux related known issues please see PetaLinux 2022.1 - Product Update Release Notes and Known Issues
For VCU related known issues please see AR# 76600: LogiCORE H.264/H.265 Video Codec Unit (VCU) - Release Notes and Known Issues and Xilinx Zynq UltraScale+ MPSoC Video Codec Unit.
2.2 Limitations
For PetaLinux related limitations please see: PetaLinux 2022.1 - Product Update Release Notes and Known Issues
For VCU related limitations please see AR# 76600: LogiCORE H.264/H.265 Video Codec Unit (VCU) - Release Notes and Known Issues, Xilinx Zynq UltraScale+ MPSoC Video Codec Unit and PG252.
YUV444 8-bit/10-bit does not support serial
(capture -> Encode -> Decode -> Display)
pipeline.YUV444 8-bit/10-bit does not support 4kp60 resolution use-cases.
3 Appendix A - Input Configuration File (input.cfg)
The example configuration files are stored at /media/card/config/
folder.
Configuration Type | Configuration Name | Description | Available Options |
---|---|---|---|
Common
| Common Configuration | It is the starting point of common configuration |
|