This wiki page complements the 2016.3 version of the Software Acceleration TRD. For other versions, refer to the Zynq UltraScale+ MPSoC Software Acceleration TRD overview page.

Change Log:

• Second release of the TRD

• This release includes the following features:

1. Test Pattern Generator supporting various sampling rates

2. The APU controlled PL accelerators for computing FFT are generated using SDSoC frame work. In 2016.1 release, the LogiCore FFT IP from Vivado IP catalog was used to compute FFT in PL.

3. Design upgraded to 2016.3 Vivado and Petalinux tool chain.

Introduction

This wiki page contains information on how to build various components of the Zynq UltraScale+ MPSoC Software Acceleration reference design (TRD) 2016.3 version. The page also has information on how to setup the hardware and software platforms and run the design on ZCU102 kit. The part used on ZCU102 board is xczu9eg-ffvb1156-1-i-es1.

About the TRD

The Software acceleration TRD is an embedded signal processing application designed to showcase various features and

capabilities of the Zynq UltrScale+ MPSoC ZU9EG device for the embedded domain. The TRD consists of two elements: The Zynq UltraScale+ MPSoC Processing System (PS) and a signal processing application (FFT) implemented in Programmable Logic (PL). The MPSoC allows the user to implement a signal processing algorithm that performs FFT on samples (coming from TPG in PL or SYSMON through external channel) either as a software program running on the Zynq UltraScale+ MP SoC based PS or as a hardware accelerator inside the PL. The design has three accelerator cores generated using SDSoC for computing 4096, 16384 and 65536 point FFTs. The data transfers of the SDSoC accelerators is controlled by APU. There is one accelerator (LogiCore FFT IP from Vivado IP catalog) for 4096 point FFT controlled by RPU. The TRD demonstrates how the user can seamlessly switch between a software or a hardware implementation and evaluate the cost and benefit of each implementation. The TRD also demonstrates the value of offloading computation-intensive tasks onto PL, thereby freeing the CPU resources to be available for user-specific applications.
For detailed information on complete feature set, hardware and software architecture of the design, please refer to the TRD user guide here.

Download the TRD

The TRD archive (rdf0376-zcu102-swaccel-trd-2016-3.zip) can be downloaded from here.

• Note :- This design doesn't support ES2 Silicon version.
  TRD DIRECTORY STRUCTURE AND PACKAGE CONTENTS
  The Software acceleration TRD package is released with the source code, hardware platform through Xilinx Vivado, SDK projects, and an SD card image that enables the user to run the demonstration and software application. It also includes the binaries necessary to configure and boot the ZCU102 board. Prior to running the steps mentioned in this wiki page, user has to download the TRD package and extract its contents to a directory referred to as ‘TRD_HOME' which is the home directory.
  

  
  The below table describes the content of each directory in detail.

• || || ||

• || apu || Contains the software source files ||

• || petalinux || Contains the Petalinux project's configuration ||

• || Qt_gui || Contains GUI sources ||

• || zcu102_swaccel_trd || SDSoC folder containg the hardware platform, pfm files and FFT accelerator C sources. ||

• || rpu || ||

• || xsdk || Contains SDK project for building RPU firmware ||

• || sdcard || Contains ready to test binaries ||

• || BOOT.BIN || BIN file containing FSBL, PL bitstream, U-boot and ARM trusted firmware ||

• || image.ub || Kernel Image ||

• || autostart.sh || Script to launch the demo ||

• || bin || This directory contains the Qt GUI application. ||

• || README.txt || Contains design version history, steps to implement the design, Vivado and Petalinux versions to be used to build the design. ||

• || THIRD_PARTY_NOTICES.zip || Contains the Copyright text for third party libraries ||

• || IMPORTANT_NOTICE_CONCERNING_THIRD_PARTY-CONTENT.txt || Contains information about the third party licences ||

• Pre-requisites

  • ZCU102 Evaluation Kit with Xilinx Vivado Design Suite, Device locked to xczu9eg-ffvb1156-1-i-es1.

  • A Linux development PC with following tools installed

  1. Xilinx Vivado 2016.3

  2. Xilinx SDK 2016.3

  3. Petalinux 2016.3

  4. Distributed version control system Git installed. For information, refer to the Xilinx Git wiki.

  5. GNU make utility version 3.81 or higher.

• KNOWN ISSUES

• 1. Display port monitor not

• 2. Linux does not fully boot, gets stuck at "Uncompressing Linux Kernel.... OK". This failure is seen on Rev-C and Rev-D boards some times.

• RUNNING THE DEMO

• This section provides step by step instructions on bringing up the ZCU102 board for demonstration of the TRD and running different options from the Graphical User Interface (referred to as GUI).

• The binaries required to run the design are in $TRD_HOME/sdcard folder. It also includes the binaries necessary to configure and boot the ZCU102 board.

• Things to know before running the demo:

• a) The SD-MMC card has to be formatted as FAT32 using a SD-MMC card reader. Copy the entire folder content from $TRD_HOME/sdcard onto the primary partition of the SD-MMC.

• b) Petalinux console login details

• User : root

• Password : root

• HARDWARE SETUP REQUIREMENTS

• Requirements for theTRD demo setup

  • The ZCU102 Evaluation kit with the part xczu9eg-ffvb1156-1

  • AC power adapter (12 VDC)

  • Optional: An USB Type-A to USB Micro-B cable (for UART communication) and a Tera Term Pro (or similar) UART terminal program.

  • USB-UART drivers from Silicon Labs

  • USB Micro-B to female Adaptor with USB hub is needed for connecting a mouse.

  • USB mouse

  • 4K monitor with Display Port support

  • Certified Display Port cable (version 1.2); TRD tested with 6 feet long E342987, Cable matters

  • (Optional, required only for testing with external audio input): XA3 SYSMON Headphone Adapter card from Faster Technology

  • (Optional, required only for testing with external audio input) An audio source like MP3 player

  • (Optional, required only for testing with external audio input) An aux cable with 3.5mm male jack on both ends.

  • A SD-MMC flash card containing TRD binaries formatted with FAT32. The SD-MMC should have the required binaries in its primary partition. Copy the binaries from sdcard folder of the TRD zip file. The required binaries include :

    • BOOT.BIN

    • Image.ub

    • autostart.sh

    • bin/sw_accel_qt

    • bin/firware/r5FFT.elf

• Note: It is recommended to use ZCU102 Rev-B board. TRD supports Ultra HD (4K) and Full HD (1080p) resolutions. The binaries provided under sdcard folder have been tested with ViewSonic (4K), ASUS(4K), Acer (4K and Dell-P2414Hb (1080p) display monitors. However, the binaries should work well with any Display Port certified monitors supporting 4K/1080p resolution in its EDID database. Please make sure to use DP certified 1.2 version of the cable for connecting ZCU102 board to the monitor.

• Board Setup

• Steps for setting the board

• Connect various cables to the ZCU102 board as shown in the below figure.