U-Boot Ethernet Driver

Table of Contents


The gigabit Ethernet controller (GEM) implements a 10/100/1000 Mb/s Ethernet MAC that is compatible with the IEEE Standard for Ethernet (IEEE Std 802.3-2008) and capable of
operating in either half or full-duplex mode in 10/100 mode and full-duplex in 1000 mode. The processing system (PS) is equipped with four gigabit Ethernet controllers. Each
controller can be configured independently. Each controller uses a reduced gigabit media independent interface (RGMII) v2.0 (to save pins).

U-Boot Config

For ZynqMP:

For Zynq

Device Tree

For ZynqMP

For Zynq

Test Procedure

HW IP features

  • Speed support for 10/100/1000 Mbps
  • MAC loopback and PHY loopback
  • Partial store and forward option
  • Packet buffer option
  • Flow control - TX/RX pause
  • Checksum offload support, CRC checking, FCS stripping
  • Promiscuous mode, Broadcast mode
  • Collision detection and enforcement - this is an IP feature, no SW support required
  • MDIO support for PHY layer management
  • Multicasting support
  • VLAN tagged frames
  • Half duplex support
  • Programmable IPG
  • External FIFO interface
  • Wake on LAN
  • IEEE1588 support for ZynqMP
  • Jumbo frame size support for ZynqMP
  • 64 bit addressing for ZynqMP
  • Priority queue support for ZynqMP
  • PS SGMII support (hardwired to 1Gbps) is present in ZynqMP

Features supported in driver

(Functional HW IP and stack related features)
  • Speed support for 10/100/1000 Mbps with clock framework
  • MDIO support for PHY layer management
  • Multicasting support
  • IEEE1588 support for ZynqMP
  • Priority queue support for ZynqMP
  • PS SGMII support is present in ZynqMP and supported in the driver
  • This driver can be used with PL SGMII/1000BaseX driver on Zynq and ZynqMP
  • This driver can be used with gmii2rgmii converter driver
  • Fixed link support for ZynqMP(Not tested for Zynq).

Missing Features, Known Issues and Limitations

  • 64-bit addressing support

Fixed Link Support in ZynqMP

Following are the steps to verify fixed link support in ZynqMP.
  • Create a design with both GEM2 and GEM3 available and loop back one to the other as mention in below wiki
Zynq Ultrascale Fixed Link PS Ethernet Demo
  • Once the design is created export to sdk and create lwip echoserver application to run from R5 processor.
  • In this application just confirm that it uses GEM2 in file src/platform_config.h
  • In lwip echo server application linkerscript go and modify linker address to 0x10000000 such that it was not overwritten by FSBL or any other images.
  • Go to bsp and change bsp settings to select uart1.
  • Now got to the corresponding bsp and then to libsrc>lwip141>src>contrib>ports>xilinx>netif>xemacpsif_physpeed.c
  • Open the file emacpsif_physpeed.c and go to routine phy_setup.c, comment the line "link_speed=get_IEEE_phy_speed(xemacpsp, phy_addr);" and assign link_speed=1000; Note that same speed should be given in u-boot dts.
  • Now save and build it.
  • Create FSBL for this design from SDK.
  • Also create ATF and PMUFW.
  • Now build u-boot for zcu102 with below changes in dts
  • Create a bootable BOOT.BIN using bif with images (pmufw, fsbl, bitstream, lwipapp, atf, u-boot).
  • Copy the BOOT.BIN onto SD card and boot from SD on ZCU102 board.
  • Open com0 port and you should see lwip prints and wait for print "TCP echo server started @ port 7".
  • Now come back to u-boot prompt and set ipaddr as using setenv.
  • Now, ping lwip echoserver running on R5 from u-boot and it should success as shown below u-boot log.