Qspips Standalone driver
This page gives an overview of the bare-metal driver support for the Zynq PS QSPI.
Table of Contents
Introduction
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
---|---|---|
qspips | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/qspips | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspips |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/qspips
The driver source code is organized into different folders. The table below shows the qspips driver source organization.
Directory | Description |
---|---|
doc | Provides the API and data structure details |
data | Driver .tcl , .mdd and .yaml files |
examples | Example applications that show how to use the driver features |
src | Driver source files, make and cmakelists file |
Note: AMD Xilinx embeddedsw build flow is changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki page Porting embeddedsw components to system device tree (SDT) based flow - Xilinx Wiki - Confluence (atlassian.net).
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 12: Quad SPI Controller in Zynq TRM.
Features
- IO access
- Legacy SPI mode
- Linear addressing mode
- Control of two chip selects/bus
- Configurable clock
- Configurable bus width
- Interrupts – will be chosen and enabled internally
Known Issues and Limitations
Supported Flash vendors
- Micron
- ISSI
- Spansion
- Macronix
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspips/examples
Test Name | Example source | Description |
---|---|---|
QSPIPS Interrupt Mode Example | xqspips_flash_intr_example.c | This examples does basic read and write test from the SPI-NOR flash device in Interrupt mode |
QSPIPS Polled Mode Example | xqspips_flash_polled_example.c | This examples does basic read and write test from the SPI-NOR flash device in Polled mode |
QSPIPS G128 Example | xqspips_g128_flash_example.c | This examples does basic read and write test from the SPI-NOR flash device greater than 128MB |
QSPIPS Self Test Example | xqspips_selftest_example.c | This examples does basic hardware connection check |
Linear QSPIPS Example | xqspips_flash_lqspi_example.c | This example does linear read operation from SPI-NOR flash device in single mode |
Linear QSPIPS Stacked mode Example | xqspips_dual_flash_stack_lqspi_example.c | This example does linear read operation from SPI-NOR flash device in stacked mode |
Linear QSPIPS Dual mode Example | xqspips_dual_flash_lqspi_example.c | This example does linear read operation from SPI-NOR flash device in dual parallel mode |
Example Application Usage
QSPIPS Interrupt Mode Example
This examples does basic read and write test from the flash device in Interrupt mode.
QSPI FLASH Interrupt Example Test FlashID=0x20 0xBB 0x18 Successfully ran QSPI FLASH Interrupt Example Test |
---|
QSPIPS Polled Mode Example
This examples does basic read and write test from the flash device in Polledmode.
QSPI FLASH Polled Example Test FlashID=0x20 0xBB 0x18 Successfully ran QSPI FLASH Polled Example Test |
---|
QSPIPS G128 Example
This examples does basic read and write test from the SPI-NOR flash device greater than 128MB
SPI Greater than 128Mb Flash Example Test FlashID=0x20 0xBB 0x18 Successfully ran QSPI Greater than 128Mb Flash Ex Test |
---|
Linear QSPIPS Example
This example does linear read operation from SPI-NOR flash device in single mode
Linear QSPI FLASH Example Test FlashID=0x20 0xBB 0x18 Successfully ran Linear QSPI FLASH Example Test |
---|
QSPIPS Self Test Example
This examples does basic hardware connection check
QSPI Selftest Example Successfully ran QSPI Selftest Example |
---|
Example Design Architecture
NA
Performance
Single
Qspips write throughput is 362 KBPS
Qspips read throughput is 27675 KBPS
Dual-Parallel
Qspips write throughput is 644 KBPS
Qspips read throughput is 33573 KBPS
Change Log
2024.1
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L508
2023.2
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L587
2023.1
None
2022.2
2022.1
None
2021.2
None
2021.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L371
2020.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L650
2020.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L92
2019.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L364
2019.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L122
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