Zynq UltraScale+ MPSoC Power Advantage Tool part 1 - Introduction to the Power Advantage Tool

Table of Contents


This page provides an introduction to the Power Advantage Tool, as well as links to how to build various components of the Power Advantage Tool and how to make them run on a supported Xilinx Evaluation Board (e.g. ZCU102). The Evaluation Board is based on a Zynq UltraScale+ MPSoC/RFSoC devices (see table below). For additional information, refer to Zynq UltraScale+ MPSoC: ZCU102 Evaluation Kit – Preliminary ZCU102 Getting Started Document.

Information instead on the Versal Adaptive SoC Power Tool can be found here.


Supported Evaluation Boards:

BoardDevice
Ultra96XCZU3EG
ZCU102XCZU9EG
ZCU106XCZU7EV
ZCU111XCZU28DR
ZCU208XCZU48DR
ZCU216XCZU49DR
ZCU670XCZU67DR

.

1 About the Power Advantage Tool

The Power Advantage Tool is a demo designed to showcase the power features of the Zynq UltraScale+ MPSoC device.
The Power Advantage Tool consists of four main elements: The Qt PC Windows GUI, the MSP430 Controller code, Zynq UltraScale+ MPSoC R5 code, and the Programmable Logic (PL) design.
(1) The Qt PC GUI provides the user interface for the Power Advantage Tool. The PC communicates to the MSP430, a low-power processor, whose job it is to stay on during the lowest power states of the Zynq UltraScale+ MPSoC, including when the Zynq device is being turned off.
(2) The MSP430 controls the Evaluation Kit Power Monitoring IC’s (INA226’s) and Power Management IC’s (PMICs), as well as communicates with the Zynq UltraScale+ R5.
(3) The R5 is the lowest-power ARM processor on the Zynq UltraScale+ MPSoC, and is on during the lowest power running states. The R5 communicates with the Power Management Unit (PMU) to set the power states, as well as selects the PL Options via GPIO.
(4) The PL contains the Hardware Design.
For additional information, please refer to Power Advantage Tool Theory of Operation.pdf

Figure 1. Power Advantage Tool Block Diagram.

2 Links

Zynq UltraScale+ MPSoC Power Advantage Tool:

Other References:

3 Prerequisites

  • Windows PC with about 40GB free
  • 4K Monitor with Display Port Interface (needed only for Ubuntu based demos) (see Xilinx recommended list) Note: HDMI can be substituted for 2017.1, but XaoS Mandelbrot will not display.
  • USB Keyboard and Mouse (needed only for Ubuntu based demos)
  • Micro USB to USB hub (needed only for Ubuntu based demos)
  • Internet Access
  • Evaluation board (e.g. ZCU102) and power supply
  • 16GB Class 10 SD Card (see Xilinx recommended list) Note: Other than Class 10 is recommended for 2017.1 and 2017.2 builds (e.g. Class 4).
  • Cables: Ethernet, DP, (2) Micro USB.
  • Vivado License with Vivado System Edition, UltraScale Plus Family with Bitgen (for SD, PL, R5)
  • TI MSP-FET (for MSP430 programming)

Note: Boards marked Revision 1.0 or higher come with the MSP430 pre-programmed, and thus the TI cable and TI Code Composer are not required for pre-built image use. Note: The exception is MSP430 version May 17th 2017, which is incompatible.

4 Power Advantage Tool Sources

This section shows how to get and install the Power Advantage Tool Sources. This will be needed for any steps that are Building from Sources.

4.1 Download the Power Advantage Tool Sources

An archive with the Power Advantage Tool Sources files zynqus_<Description>_pwr_<Board>_<Datecode>.zip (e.g. zynqus_ubuntu_pwr_20161005.zip) can be downloaded below (requires sign up).
zynqus_ubuntu_pwr_20161005.zip2016.2 ZCU102 Download
zynqus_pwr_20170403.zip2016.3 ZCU102 Download
zynqus_pwr_zcu102_20171220.zip2017.1 ZCU102 Download
zynqus_pwr_zcu106_20180111.zip2017.1 ZCU106 Download
zynqus_pwr_zcu102_20180227.zip2017.4 ZCU102 Download
zynqus_pwr_zcu102_20180701.zip2018.1 ZCU102 Download
zynqus_pwr_zcu106_20180701.zip2018.1 ZCU106 Download
zynqus_pwr_zcu111_20181019.zip2018.2 ZCU111 Download
zynqus_pwr_zcu111_20181219.zip2018.3 ZCU111 Download
zynqus_pwr_zcu102_20200204.zip2019.1 ZCU102 (PL) Download
zynqus_pwr_zcu111_20190529.zip2019.1 ZCU111 Download
zynqus_pwr_zcu208_20200324.zip2019.2 ZCU208 ES1 Download
zynqus_pwr_zcu216_20200225.zip2019.2 ZCU216 ES1 Download
zynqus_pwr_zcu111_20200526.zip2020.1 ZCU111 Download
zynqus_pwr_zcu208_20200710.zip2020.1 ZCU208 ES1 Download
zynqus_pwr_zcu216_20200710.zip2020.1 ZCU216 ES1 Download
zynqus_pwr_ultra96_20200920.zip2020.2 Ultra96 Download
zynqus_pwr_zcu106_20210208.zip2020.2 ZCU106 Download
zynqus_pwr_zcu111_20200901.zip2020.2 ZCU111 Download
zynqus_pwr_zcu208_20200902.zip2020.2 ZCU208 ES1 Download
zynqus_pwr_zcu216_20200902.zip2020.2 ZCU216 ES1 Download
zynqus_pwr_zcu111_20210509.zip2021.1 ZCU111 Download
zynqus_pwr_zcu216_20210630.zip2021.1 ZCU216 Download
zynqus_pwr_zcu111_20210831.zip2021.2 ZCU111 Download
zynqus_pwr_zcu670_20211011.zip2021.2 ZCU670 Download
zynqus_pwr_ultra96_20211119.zip2021.2 Ultra96 Download

4.2 Power Advantage Tool Sources Contents

After you have downloaded the Power Advantage Tool Sources package, extract its contents to C:


Figure 2. Power Advantage Tool Sources Directory.

5 Xilinx Vivado and SDK

Optional: This section shows how to get the Xilinx Vivado and SDK tools. These will be needed for any of the steps that Build SD, PL, or R5 from Sources.

5.1 Install Xilinx Vivado and SDK

Install Vivado and SDK per instructions on Xilinx.com.

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