Zynq UltraScale MPSoC Base TRD 2017.4 - Design Module 5

Zynq UltraScale MPSoC Base TRD 2017.4 - Design Module 5

Design Overview

This module shows how to build a Qt video application demonstrating the following features:
  • Display via PS DP (DRM framework).
  • Video capture from USB webcam or virtual video device (vivid) (V4L2 framework).
  • GUI overlay via GPU with OpenGL (using Qt framework)

Design Components

This module requires the following components:
  • petainux_bsp
    • zynqmp_fsbl
    • pmufw
    • bl31
    • u-boot
    • kernel
    • device tree (zcu102-base-dm5.dtsi)
    • rootfs
  • video_lib
  • video_qt2

Build Flow Tutorials

This tutorial uses both SDx and PetaLinux tools. It is recommended to use separate shells for each of the tools.

Note: For consistency the SDx tool is used for all design modules. However, the SDx compiler is not called in this tutorial. SDx is just an eclipse profile that can call the ARM C/C++ compiler, just like XSDK. It is possible to use XSDK to perform the steps in this tutorial. To do so, replace sdx with xsdk in the below code snippet

PetaLinux BSP

This tutorial shows how to build the Linux image and boot image using the PetaLinux build tool.

  • The petalinux-config step can be skipped if this was already done in a previous module.
  • Select the device-tree matching design module 5 and build all Linux image components. If you have run petalinux-build in a previous module, the build step will be incremental.
  • Create a boot image.
  • Copy the generated boot image and Linux image to the dm5 SD card directory.

Video Qt Application

This tutorial shows how to build the video library and the video Qt application.
  • Set the SYSROOT environment variable. This requires that you have previously completed the PetaLinux build step.
    Note 1 : Make sure you set the env variable in the same shell that is used to launch SDx. Also make sure the env variable is set before starting SDx, otherwise close and re-start SDx.
    Note 2: The below command assumes you are using the default yocto tmp directory. If you are using a custom yocto tmp directory, you need to modify the path accordingly.
  • Set up the Qt environment and generate a Makefile for the Qt project. Make sure the TRD_HOME, PETALINUX, and SYSROOT environment variables are set before running this step.
  • Create a new SDx workspace.
  • Click 'Import Project' from the welcome screen, browse to the current working directory and make sure both the video_lib and video_qt2 projects are selected. Uncheck the filter2d and optical_flow projects. Click finish.
  • Right-click the video_lib project and select 'C/C++ Build Settings'. Navigate to 'Symbols' and remove the 'WITH_SDSOC' symbol from the defined symbols panel by clicking the delete icon with the red X.
  • Right-click the video_qt2 project and click 'Build Project'.
  • Copy the generated video_qt2 executable to the dm5 SD card directory.

Run Flow Tutorial

  • See here for board setup instructions.
  • Copy all the files from the $TRD_HOME/images/dm5 SD card directory to a FAT formatted SD card.
  • Power on the board to boot the images; make sure all power rail LEDs are lit green.
  • After ~30 seconds, the display will turn on and the application will start automatically, targeting the max supported resolution of the monitor (one of 3840x2160 or 1920x1080 or 1280x720).
  • To re-start the TRD application with the max supported resolution, run
  • To re-start the TRD application with a specific supported resolution use the -r switch e.g. for 1920x1080, run
  • The user can now control the application from the GUI's control bar (bottom) displayed on the monitor.
  • The following video sources are available:
    • TPG (SW): virtual video device that emulates a USB webcam purely in software
    • USB: USB webcam using the universal video class (UVC) driver
  • The user can select from the following accelerator options:
    • Passthrough (no accelerator)
  • The video info panel (top left) shows essential settings/statistics.
  • The CPU utilization graph (top right) shows CPU load for each of the four A53 cores.

Return to the Design Tutorials Overview.