Xilinx DRM VPSS Scaler driver with CSC

Table of Contents


The purpose of this page is to describe the Linux DRM scaler driver for Xilinx Video Processing SubSystem(VPSS) soft IP.

Driver Overview

The Linux DRM scaler driver (xlnx_scaler.c) is part of Xilinx VPSS and implemented as DRM bridge driver. The scaler can be connected as an optional
component to any encoder of DRM framework.
Below is the example design where scaler is connected as a bridge to SDI-TX encoder.
In the diagram Blue colored arrow path indicates the HW physical connection and green colored arrow path indicates the Software flow.

IP/Driver Features

IP features2019.12019.2 and above
IP version2.02.2
One, two or four pixel-wide AXI4-Stream video interfaceYes*Yes*
Video resolution support up to UHD at 60 fpsYesYes
8, 10, 12, and 16 bits per component supportYes**Yes**
Bilinear, Bicubic and polyphase algorithms supported.Yes***Yes***

Missing Features / Known Issues / Limitations in Driver

  • Colorspace support options are limited to only RGB | YUV 4:4:4 | YUV 4:2:2 | YUV 4:2:0. All other colorspace options are not supported in this release.
     
  • *The maximum samples per clock supported by the Linux Driver is 1 and 2 (also called pixels per clock). 4 pixels per clock is not supported.
  • **12 and 16 bit color depth is not supported by this driver. 
  • **Maximum color depth supported by the VPSS Scaler soft IP driver is limited to 8-bit and 10-bit in this release.
  • ***Asymmetrical scaler taps are not supported. Horizontal taps must be same as Vertical taps.
  • Fixed coefficients are used in the driver. In future, this may be an input from application.
  • For all bpc(8 and 10) color formats, driver uses fixed media bus format codes as mentioned in Table No.1
  • Tested the display pipeline, when VPSS is configured as "scaler_only" mode.

Video Processing Subsystem Release Notes and Known Issues

Kernel Configuration options for Driver

CONFIG_DRM_XLNX_BRIDGE_SCALER should be enabled. This depends on CONFIG_DRM_XLNX_BRIDGE

Device Tree Binding

The dts node should be defined with correct hardware configuration. How to define the node is documented here, xlnx,vpss-scaler.txt

Test Procedure

This driver is a bridge instance to DRM encoder(eg: SDI-TX) and it can be verified only when its connected to an encoder driver.

To support bridge functionality encoder driver accepts drm properties like height, width and color format of input and output.

Following is the table of color formats and its equivalent media bus format value to be passed as drm properties.

Refer the media bus formats here

FormatMedia Bus Value
RGB4106
YUV4448228
YUV4208448
YUV422 8207 

Table No:1

Example commands:

Ex: Command to perform upscale 1080p@30(1920x1080) to 4K@30(3840x2160) on a 8-bit design:

./modetest -M xlnx -s 30:1920x1080-30@YUYV -w 30:sdi_mode:4 -w 30:sdi_data_stream:8 -w 30:is_frac:0 -w 30:height_out:2160 -w 30:width_out:3840  -w 30:in_fmt:8207 -w 30:out_fmt:8207

Ex: Command to perform upscale 1080p@30(1920x1080) to 4K@30(3840x2160) on a 10-bit design:

./modetest -M xlnx -s 30:1920x1080-30@XV20 -w 30:sdi_mode:4 -w 30:sdi_data_stream:8 -w 30:is_frac:0 -w 30:height_out:2160 -w 30:width_out:3840  -w 30:in_fmt:8207 -w 30:out_fmt:8207

Ex: Command to perform 1:1scale 1080p@60(1920x1080) to 1080p@60(1920x1080) on a 10-bit design:

./modetest -M xlnx -s 30:1920x1080-60@XV20 -w 30:sdi_mode:2 -w 30:sdi_data_stream:2 -w 30:is_frac:0 -w 30:height_out:1080 -w 30:width_out:1920  -w 30:in_fmt:8207 -w 30:out_fmt:8207

Ex: Command to perform 1:1scale with interlaced  1080i@60(1920x1080) to 1080i@60(1920x1080) on a 10-bit design:

./modetest -M xlnx -s 30:1920x1080i-60@XV20 -w 30:sdi_mode:0 -w 30:sdi_data_stream:2 -w 30:is_frac:0 -w 30:height_out:540 -w 30:width_out:1920  -w 30:in_fmt:8207 -w 30:out_fmt:8207 -v

Known Issues

  • AR65449 - LogiCORE IP Video Processing Subsystem(VPSS) - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions

Change log

2024.2

  • No change

2024.1

  • No change

2023.2

  • No change

2023.1

  • 3e7d027 drm: xlnx: scaler: Initialize variable nr_rds\ 

2022.2

  • No change

2022.1

  • No change

2021.2

  • No change

2021.1

  • No change 

2020.2

  • No change 

2020.1

  • Summary:
    • Improved quality
  • Commits:
    • 55d745 drm: xlnx: scaler: Improved quality by adding more coefficients

2019.2

  • Summary:
    • Added support for ip version 2.2
  • Commits:
    • 8ca1ff drm: xlnx: scaler: Add max width and height properties

2019.1

  • Summary:
    • Added support for clock framework
    • Added max width and height properties
  • Commits:
    • ee1de9 drm: xlnx: scaler: Add max width and height properties
    • d52ad5 drm: xlnx: scaler: Add support for clock framework


2018.3

  • Summary:
    • Fixed array out of bound access
  • Commits:
    • fbb9f7 drm: xlnx: scaler: Fix array out of bound access

2018.2

  • Summary
    • No change 

2018.1

  • Summary:
    • Updated IP reset logic
    • Added YUV420 support
    • Added zero out H-phase array before changing resolution
    • Initial version
  • Commits:
    • 724f25 drm: xlnx: scaler: Updating vpss-scaler reset logic
    • 8ab111 drm: xlnx: scaler: Add YUV420 support
    • a9ef6a drm: xlnx: scaler: Adding Zero out H-phase array before changing resolution
    • 5f6e20 drm: xlnx: scaler: Adding vpss-scaler driver

Related Links


© Copyright 2019 - 2022 Xilinx Inc. Privacy Policy