This page gives an overview of the bare-metal driver support for the The LogiCORE™ IP AXI Quad Serial Peripheral Interface (SPI).

Introduction

The AXI Quad Serial Peripheral Interface (SPI) core connects the AXI4 interface to those SPI slave devices that support the Standard, Dual, or Quad SPI protocol instruction set. This core provides a serial interface to SPI slave devices. The Dual/Quad SPI is an enhancement to the standard SPI protocol (described in the Motorola M68HC11 data sheet) and provides a simple method for data exchange between a master and a slave.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.

Driver Name	Path in Vitis	Path in Github
spi	<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/spi	https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/spi

Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/spi

The driver source code is organized into different folders. The table below shows the nandpsu driver source organization.

Directory	Description
doc	Provides the API and data structure details
data	Driver .tcl , .mdd and .yaml files
examples	Example applications that show how to use the driver features
src	Driver source files, make and cmakelists file

Note: AMD Xilinx embeddedsw build flow is changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki page Porting embeddedsw components to system device tree (SDT) based flow - Xilinx Wiki - Confluence (atlassian.net).

The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in the future.

Driver Implementation

For a full list of features supported by this IP, please refer to Axi Quad Spi.

Features

DMA access (aligned address only)
IO access
Configurable clock
Configurable bus width
Interrupts – will be chosen and enabled internally

Known Issues and Limitations

The standalone driver supports Axi-spi and AXI Quad spi

Supported Flash vendors

Micron

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab

Links to Examples

Examples Path:

https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/spi/examples

Test Name	Example Source	Description
Axi Quad Spi STM Flash Example	xspi_stm_flash_example.c	This examples does basic read and write test from the Stm flash device
Axi Quad Spi Numonyx Flash Example	xspi_numonyx_flash_quad_example.c	This examples does basic read and write test from the Numonyx flash device
Axi Quad Spi Winbond Flash Example	xspi_winbond_flash_quad_example.c	This examples does basic read and write test from the Winbind flash device
Axi Quad Spi Atmel Flash Example	xspi_atmel_flash_example.c	This examples does basic read and write test from the Atmel flash device

Example Application Usage

Axi Quad Spi STM FlashExample

This examples does basic read and write test from the Stm flash device.

XSPI Stm Flash Example Test
Successfully ran XSPI Stm Flash Example Test

Axi Quad Spi Numonyx FlashExample

This examples does basic read and write test from the Numonyx flash device.

XSPI Numonyx Flash Quad Example Test

Successfully ran XSPI Numonyx Flash Quad Example Test

Axi Quad Spi Winbond FlashExample

This examples does basic read and write test from the Winbond flash device.

XSPI Windbond Flash Quad Example Test

Successfully ran XSPI Flash Quad Example Test

Axi Quad Spi Atmel FlashExample

This examples does basic read and write test from the Atmel flash device.

XSPI Atmel Flash Example Test
Successfully ran XSPI Atmel Flash Example Test

Example Design Architecture

NA

Performance

Change Log

2023.2

https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L605

2023.1

https://github.com/Xilinx/embeddedsw/blob/86f54b77641f325042a1101fead96b2714e6d3ef/doc/ChangeLog#L458

2022.2

None

2022.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2022.1/doc/ChangeLog#L103

2021.2

None

2021.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L391

2020.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L680

2020.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L530

2019.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L1441

2019.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L1202

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