ZU+ Example - Deep Sleep

Table of Contents

Requirements
Known Issue
Vivado: Generate HDF with Isolation config
Create a new Vivado project
Create Block Design
Import already created block design
Create new block design
Customize ZYNQ IP
Configure required peripheral(s)
Enable Isolation Config
Add Subsystems
Generate Hardware Description File(HDF)
Configuration Object
Petalinux on APU
Create petalinux project
Configure petalinux to use hdf generated from Vivado design
Build petalinux project
RPU baremetal application running from TCM
Running Linux on APU and RPU baremetal app
Related Links
Zynq UltraScale+ MPSoC Design Example - Deep Sleep

This example explains procedure to put system in deep-sleep mode starting from Vivado isolation design, petalinux for APU, TCM baremetal for RPU.
This includes:

Requirements

  1. ZCU102 development board (This design example has been tested on silicon 3.0 revD board).
  2. Vivado (2017.1 or later release)
  3. SDK (2017.1 or later release)
  4. Petalinux (2017.1 or later release)

Known Issue

With production silicon, the PMU is driven by the SysOsc, which normally runs at 200 MHz. This is different from pre-production silicon where the PMU is driven by the 33 MHz PS Ref clock instead, and consumes much lower power. This means that for the production silicon to get to the target deep sleep power (35 mW), the SysMon must be powered down. Refer to this design example on how to power down the SysMon:
http://www.wiki.xilinx.com/ZU%EF%BC%8B+Example+-+Deep+Sleep+with+PS+SysMon+in+Sleep+Mode during deep sleep.

Vivado: Generate HDF with Isolation config

This section explains procedure to create new project in Vivado, isolation configuration and exporting bit-stream/HDF files.

Create a new Vivado project

Start Vivado. Once Vivado GUI is ready, create a new zcu102 project :

Create Block Design

One can create new block design (if familiar with creating designs using Vivado) or import already created block design (basic working design).

Import already created block design

Import example block design by following steps mentioned below and
directly jump to section Generate HDF.
  1. Download attached ready block design file
  2. Click on TCL console in Vivado.
  3. In the line on the bottom where it says "type tcl command here", type below command to import block design:
    source <path to tcl file>/isolation_config.tcl



Create new block design


To create a new block design follow below steps:

Customize ZYNQ IP

This step is useful to customize "Zynq UltraScale+ MPSoC" and isolation configuration.

Configure required peripheral(s)

This is used to add/remove peripherals in block based on requirement. This step can be skipped if default peripherals suits the requirement.

IMPORTANAT: Make sure that PMU is enabled (in I/O Configuration → Low Speed → I/O Peripherals → PMU) as per below image otherwise domain power on/off won't work.


Notes:
  1. All below steps are available after when you switch to advanced option.
  2. One has to be very sure about peripherals required for the system. System with design may not work if mandatory peripherals are not selected.

Enable Isolation Config


Note: Isolation configurations creates isolation between different blocks and may restrict access to other blocks on system. Isolation configurations needs extra care of adding minimum subsystems and assigning required master/slaves to each system. If isolation configuration is not done properly, system may not boot. If you need, you may use example block design (with isolation config enabled) as reference.

Add Subsystems

By default there will be single subsystem present named "PMU Firmware". More subsystems can be added based on requirements.


Add APU subsystem
Below is an example:




Add RPU subsystem

Below is an example:


Note: User needs to know minimum configuration required based on their system. Refer Isolation Configuration Consideration for more information on isolation configuration.

Add RPU1 subsystem

Below is an example:

Add APU_secure subsystem

Below is an example:


Note: You may need to change Secure/Non-secure settings according to your other sub system setting.

Generate Hardware Description File(HDF)

Generate HDL wrapper
Generate Block Design (Optional)
Run Simulation
Generate Bitstream
Export HDF file



Configuration Object

Configuration Object file Generated by PetaLinux tool chain and Vivado is attached below.


Subsystems -
1) Linux Subsystem
Master -
  1. APU
Slaves -
  1. DDR
  2. L2 Cache
  3. OCM Bank 0, 1, 2 and 3
  4. I2C0
  5. I2C1
  6. SD1
  7. QSPI
  8. PL

2) R5-0 Subsystem
Master -
  1. RPU0
Slaves -
  1. TCM Bank 0 - A
  2. TCM Bank 0 - B

3) R5-1 Subsystem
Master -
  1. RPU1
Slaves -
  1. TCM Bank 1 - A
  2. TCM Bank 1 - B


Petalinux on APU

Create petalinux project

Run below commands from bash terminal to create project petalinux.
source <petalinux-install-dir>/settings.sh
petalinux-create -t project --template zynqmp -s /proj/petalinux/petalinux-v2017.1_bsps_daily_latest/xilinx-zcu102-v2017.1-final.bsp

Configure petalinux to use hdf generated from Vivado design

petalinux-config --get-hw-description=<path-to-hdf> --oldconfig

Build petalinux project

petalinux-build

RPU baremetal application running from TCM


Refer ZU+ Example - Deep Sleep with Periodic Wake-up to build and run baremetal applications.

Note: To use new generated design, in application create step, instead of selecting "ZCU102_hw_platfrom" as target, follow below steps:

Running Linux on APU and RPU baremetal app

One can use either create add RPU application in BOOT.bin along with other things(fsbl, pmufw, bl31, atf, bit file generated from block design) and run Linux and RPU app using SD boot mode or can load RPU application from XSDB when Linux is up. Following steps describes XSDB way to load RPU application.
When RPU application runs, it suspends APU and then suspends itself (Deep Sleep). It remains in deep sleep mode for some time. Then Timer events wakes up RPU. RPU then wakes up APU and system comes of deep-sleep mode.

Related Links