PL330 Standalone Driver


Introduction

This page gives an overview of pl330/dmaps DMA driver which is available as part of the Xilinx Vivado and SDK distribution.

Table of Contents



How to enable

Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/dmaps

Driver source code is organized into different folders. Below diagram shows the dmaps driver source organization

DMAPS
|
-- doc - Provides the API and data structure details
|
- data - Driver tcl and MDD files.
|
- examples - Reference application to show how to use the driver APIs and calling sequence
|
- src - Driver source files

Features Supported

Controller Features

Standalone Driver Supported Features

All Controller Features Supported.

Test cases

---> Refer below pah for testing different examples for each feature of the IP.
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/dmaps/examples
xdmaps_example_w_intr.c : This is an example which explains how to configure controller feature and how to do
a memory to memory transfer between the Eight concurrent DMA channels.

Known issues and Limitations


Change Log

2020.2

Summary:

Support for parallel makefile execution

Commits:

https://github.com/Xilinx/embeddedsw/commits/xilinx-v2020.2/XilinxProcessorIPLib/drivers/dmaps

2020.1

Summary:

Minor bug fix for channel boundary check.

Commits:

https://github.com/Xilinx/embeddedsw/commits/xilinx-v2020.1/XilinxProcessorIPLib/drivers/dmaps

2019.2

Summary:

Minor bug fix adding memory barrier before DMASEV instruction

Commits:

https://github.com/Xilinx/embeddedsw/commits/xilinx-v2019.2/XilinxProcessorIPLib/drivers/dmaps

ea3c8cc dmaps: Add barrier before DMASEV instruction


2019.1

2018.3

2018.2
2018.1
2017.4
2017.3
2017.2
2017.1
2016.4
2016.3

Related Links