BRAM Standalone driver


Introduction

This page gives an overview of bram (block ram comtroller) driver which is available as part of the Xilinx Vivado and SDK distribution.

Table of Contents

BRAM Standalone driver#Introduction
BRAM Standalone driver#Features Supported
BRAM Standalone driver#Controller/Driver features supported
BRAM Standalone driver#Known issues and Limitations
BRAM Standalone driver#Test cases
BRAM Standalone driver#BRAM selftest example
BRAM Standalone driver#BRAM interrupt example
BRAM Standalone driver#Changelog
BRAM Standalone driver#2017.4
BRAM Standalone driver#2017.3
BRAM Standalone driver#Related Links
Source path for the driver:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/bram

Driver source code is organized into different folders. Below diagram shows the bram driver source organization

bram
|
-- Doc - Provides the API and data structure details
|
- Examples - Reference application to show how to use the driver APIs and calling sequence
|
- Source - Driver source files

Features Supported

Controller/Driver features supported


The Xilinx BRAM controller is a soft IP core designed for Xilinx FPGAs and contains the following general features,

Known issues and Limitations

None

Test cases

BRAM selftest example

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/bram/examples/xbram_example.c
This example initializes ECC for BRAM and executes the selftest.
Output
Successfully ran Bram Example

BRAM interrupt example

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/bram/examples/xbram_intr_example.c
This example configures interrupt for BRAM controller and evaluates triggering of interrupt through fault injection
Output
Successfully ran Bram Interrupt Example

Changelog

2020.2

2020.1


2019.2

2017.4

2017.3


Related Links