The Cortex-R5 processor set to operate in the lock configuration uses only one set of CPU interfaces. Because Cortex-R5 processor only supports the static split/lock configuration, switching between these modes is only permitted while the processor group is held in power-on reset.
This page explains in detail how to run the RPU in Lock-step mode.
the_ROM_image: { [fsbl_config] r5_single [bootloader] R5_FSBL.elf [destination_cpu=r5-0] R5_core0_hello_world.elf } |
1+0 records in 1+0 records out 33554432 bytes (34 MB) copied, 0.300993 s, 111 MB/s |
{{87448+0 records in}} {{87448+0 records out}} {{87448 bytes (87 kB) copied, 3.14043 s, 27.8 kB/s}} |
-------------------------------------------------------------------------------------------------------------------------- Xilinx Resticted QEMU Sep 29 2014 20:00:35. This QEMU binary and its source are restricted to Xilinx internal use only. Do not delete this message in source. Contact the Xilinx QEMU Maintainer (git-dev@xilinx.com) for details on publishing QEMU contributions to customers. -------------------------------------------------------------------------------------------------------------------------- Hello World R5 Lockstep |