In this article we will discuss how to execute a MicroBlaze application from the PS DDR on the Zynq-7000 SoC. There are some caveats with this flow. For instance, the MicroBlaze upon reset will fetch instructions from where ever the boot vector is pointing to. In this case, we will see issues since we are using PS DDR. The Programmable Logic (PL) is configured before the PS DDR is configured with the App. So, this would lead to a hang of the MicroBlaze. This article discusses how to use the reset mode in the MicroBlaze to workaround this.
In this demo the ZC702 is used. However, the same flow will apply for all Zynq boards.
Table of Contents
Launch Vivado, and create a project targeting the Zynq device.
Tip: For ease of use in changing the DDR address. Change the range to 4K first, then change the base address to 0x0010_0000. Then, change the range to 256MB (or whatever size you need).
Select File -> New -> Application Project. Set the Project Name to "fsbl", and the Processor to "ps7_cortexa9_0" and select Next. Select the Zynq FSBL and Finish.
We can add the debug to the FSBL (this is optional). To do this, right click on the fsbl in the Project explorer and select C/C++ Build Settings and add the FSBL_DEBUG_INFO to the compiler symbol:
Next, open the fsbl_hooks.c from fsbl/src in the Project Explorer, and add the code to toggle the GPIO that we added in the Hardware. You can add the register writes seen below to the FsblHookFallback function:
Right click on the FSBL, and select Generate Linker Script, and place all sections in ps7_ram_0 and Generate.
Create the MicroBlaze Hello World Application. Select New -> Application Project. Set the Project Name to "hello", and the Processor to "microblaze_0" and select Next. Select the Hello World and Finish. This will automatically create the BSP. The BSP will use the PS7_UART_1 for STDIN/OUT as we have connected the DP interface on the MicroBlaze to the GP port which allows access to PS IP (including the UART). Generate the Linker script for this application and make sure all sections are in the DDR.
Note: Both the MicroBlaze app and the FSBL are sharing the same ps7_uart_1. Be aware that if both processors try to write at the same time, you might see issues.
Note: The linker script will automatically be created based on the memory settings detected in the XSA. In this case, the DDR i set to 0x0010_0000:
Here, we will be booting from the SD card. To create a BIN image for the SD card, use the Create Boot Image tool in the SDK. Right click on the FSBL, and select Create Boot Image. The FSBL and the BIT should be pre-populated. If not, then you can add these manually using the Add button in the GUI.
Note: the FSBL partition type is bootloader, all other partitions are datafile. Add the hello.elf (select Add, and browse to the hello.elf. The partition type is datafile):
Select Create Image to create the BOOT.BIN file.
Place this BOOT.bin file onto the SD card, and set the bootmode to boot from the SD card and power on the board. You will see the FSBL debug information, and the Hello World App:
connect fpga -no-rev -f design_1_wrapper/hw/design_1_wrapper.bit # Download FSBL to A9 #0 targets -set -nocase -filter {name =~ "APU"} source design_1_wrapper/hw/ps7_init.tcl;ps7_post_config targets -set -filter {name =~ "ARM Cortex-A9 MPCore #0"} dow design_1_wrapper/zynq_fsbl/fsbl.elf con after 500 stop dow hello_world_mb/Debug/mb_bootloop_le.elf # set stdin/out to mdm in BSP settings #targets -set -filter {name =~ "MicroBlaze Debug Module at USER2"} #jtagterminal # Wake up Microblaze targets -set -nocase -filter {name =~ "APU"} mwr -force 0xE000A284 0x00000001 mwr -force 0xE000A048 0x00000001 |
The mb_bootloop_le.elf can be copied from your Vivado project; project_1.gen\sources_1\bd\design_1\ip\design_1_microblaze_0_0\data |