Table of Contents

Document History

DateVersionAuthorDescription of Revisions
05/12/20161.0Rutuja Chavan & Rajesh GugulothuInitial Version
17/02/20171.1Rutuja Chavan1. Updated to 2016.4 tool version
2. Designed for ZCU102 Rev1.0 and RevB/C/D Boards
16/05/20172.0Rajesh Gugulothu1. Updated to 2017.1 tool version
2. Designed for ZCU102 Rev1.0 and RevB/C/D prod silicon Boards
11/06/20182.1Surender Polsani1. Updated to 2018.1 tool version
2. Designed for ZCU102 Rev1.0 and RevB/C/D prod silicon Boards


The Zynq® UltraScale+™ MPSoC USB 3.0 controller consists of two independent dual-role device (DRD) controllers. Both can be individually configured to work as host or device at any given time. The USB 3.0 DRD controller provides an eXtensible host controller interface (xHCI) to the system software through the advanced eXtensible interface (AXI) slave interface. An internal DMA engine is present in the controller and it utilizes the AXI master interface to transfer data. There are four primary types of communication defined by the USB protocol, based on which any required application can be built without changing the firmware or underlying hardware for different applications. These transfer types are Control Transfer, Bulk Transfer, Isochronous transfer and Interrupt transfer. Zynq® UltraScale+™ MPSoC USB3.0 controller supports all four types of transfers.This Tech Tip explains how to enable all the configuration options, step by step procedure to use the Zynq® UltraScale+™ MPSoC USB 3.0 controller in device mode and make use of bulk transfer type for mass storage device using the USB 3.0. For complete specifications of USB protocol and class specific specifications refer:
This design covers:


Implementation Details
Design TypePS Only
SW TypeZynq® UltraScale+™ MPSoC Linux
CPUsARM Cortex A53 Core 0 running at 1.1 GHz
PS Features
  • DDR3
  • Cache
  • L1 and L2 Cache
  • OCM
  • Generic Interrupt Controller
  • USB 3.0 Controller
Boards/ToolsZCU102 Prod silicon Boards (B/C/D)
ZCU102 Rev 1.0 Board
Xilinx Tools VersionXilinx petalinux SDK 2018.1 or latest
Other Details--

Files Provided
Zynqmp_mass_storage_design_files_2018_1.zipSee Appendix A for the descriptions of the design files

Block Diagram

Figure 1: Zynq ultrascale + MPSoC USB 3.0 mass storage device reference block diagram

Linux:Zynq® UltraScale+™ MPSoC USB 3.0 controller's mass storage device class functionality

This section explains Linux gadget driver support for Zynq® UltraScale+™ MPSoC USB 3.0 controller and how to use these drivers for configuring the Zynq® UltraScale+™ MPSoC USB 3.0 controller as a mass storage device. This section also explains the steps in PetaLinux SDK to configure the Linux kernel, source tree and also steps to build Linux image and Linux kernel modules.
Configuring and building the Linux for Mass storage gadget driver support using PetaLinux SDK:

Note:This Tech Tip is developed based on PetaLinux version 2018.1. It recommend to download the PetaLinux installer version 2018.1 from Xilinx website. This example uses the ZCU102 PetaLinux BSP to create a PetaLinux project. For Rev1 board download ZCU102,ES2,Rev1.0 BSP and for Rev B/C/D boards, download ZCU102 BSP from xilinx website.

Figure 2: Linux kernel configuration enable USB for mass storage mode
Figure 3: Linux kernel configuration to enable userspace driven configuration

Preparing SD card:

copy the following files into the SD card

Note:For user convenience SD card images are provided along with this Tech Tip. Download the design files archive released with this Tech Tip and extract it under the convenient location of host machine. Find the SD card images under the path Zynqmp_mass_storage_design_files_2018_1/ of your extracted directory. For Rev1.0 board copy files from Zynqmp_mass_storage_design_files_2018_1/Rev_1_0_prebuilt_images on to SD card and for Rev B/C/D boards, copy files from Zynqmp_mass_storage_design_files_2018_1/Rev_BCD_prebuilt_images on to SD card. Refer to appendix A for more information about design files.

ZCU102 Board Setup:

Figure 4: ZCU102 board setup in device mode

Figure 5: SD boot mode switch setting for ZCU102 board
Figure 6: SD boot mode switch setting for ZCU102 Rev1.0 board

Testing Linux Zynq® UltraScale+™ MPSoC USB 3.0 mass storage device functionality on Windows host PC:

Figure 7: Windows disk format wizard

Appendix A: Design File structure