This page gives an overview of the bare-metal driver support for the Xilinx® LogiCORE™ IP Arasan SD 3.0 host controller.
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path to Vitis | Path in Github |
---|---|---|
sdps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/sdps | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/ |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/sdps |
The driver source code is organized into different folders. The table below shows the sdps driver source organization.
Directory | Description |
---|---|
doc | Provides the API and data structure details |
data | Driver .tcl, .mdd and .yaml file |
examples | Example applications that show how to use the driver features |
src | Driver source files, make and cmakelists file |
Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.
For a full list of features supported by this IP, please refer Chapter 72: SD/eMMC Controllers in Versal TRM (Versal platform) and Chapter 26: SD/SDIO/eMMC Controller in ZynqMP TRM
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab.
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/sdps/examples
Test Name | Example Source | Description |
---|---|---|
Read and Write example without file system | This examples does basic raw read and write test from SD/eMMC device in Polled mode. | |
Read and Write example with file system (using XILFFS library) | This examples does basic file system read and write test from SD/eMMC device in Polled mode. |
This examples does basic raw read and write test from SD/eMMC device in Polled mode.
Expected Output
SD Raw Read/ Write Test Successfully ran SD Raw Read/ Write Test |
This examples does basic file system read and write test from SD/eMMC device in Polled mode.
Expected Output
SD Polled File System Example Test Successfully ran SD Polled File System Example Test |
NA
High speed | 20.54 MB/sec |
High Speed | 19.4 MB/Sec |
SDR | SDR104: 76.50MB/sec |
DDR | DDR50: 40.68MB/sec |
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L601
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.1/doc/ChangeLog#L120
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2022.2/doc/ChangeLog#L136
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2022.1/doc/ChangeLog#L98
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.2/doc/ChangeLog#L304
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L466
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L228
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L100
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L15
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L150
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.3/doc/ChangeLog#L137
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.2/doc/ChangeLog#L85
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.1/doc/ChangeLog#L273
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.4/doc/ChangeLog#L18
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.3/doc/ChangeLog#L329
None
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2017.1/doc/ChangeLog#L326
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.4/doc/ChangeLog#L44
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2016.3/doc/ChangeLog#L178